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authorOlof Johansson <olof@lixom.net>2012-03-08 18:20:29 +0100
committerOlof Johansson <olof@lixom.net>2012-03-08 18:20:29 +0100
commitacf346084bca289a00020a5c29c23673b801b380 (patch)
tree1ab7f6eeefd0564d8fb708b858dc19c8b7e0a67c /drivers/net/ethernet/mellanox/mlx4/eq.c
parentMerge tag 'tegra-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/t... (diff)
parentARM: mx35: Setup the AIPS registers (diff)
downloadlinux-acf346084bca289a00020a5c29c23673b801b380.tar.xz
linux-acf346084bca289a00020a5c29c23673b801b380.zip
Merge tag 'imx35-imx5-aips-setup' of git://git.pengutronix.de/git/imx/linux-2.6 into next/soc
i.MX35/5 AIPS setup Includes sync up to 3.3-rc6 * tag 'imx35-imx5-aips-setup' of git://git.pengutronix.de/git/imx/linux-2.6: ARM: mx35: Setup the AIPS registers ARM: mx5: Use common function for configuring AIPS
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx4/eq.c')
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/eq.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c
index 8fa41f3082cf..9129ace02560 100644
--- a/drivers/net/ethernet/mellanox/mlx4/eq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/eq.c
@@ -1036,7 +1036,7 @@ int mlx4_assign_eq(struct mlx4_dev *dev, char* name, int * vector)
struct mlx4_priv *priv = mlx4_priv(dev);
int vec = 0, err = 0, i;
- spin_lock(&priv->msix_ctl.pool_lock);
+ mutex_lock(&priv->msix_ctl.pool_lock);
for (i = 0; !vec && i < dev->caps.comp_pool; i++) {
if (~priv->msix_ctl.pool_bm & 1ULL << i) {
priv->msix_ctl.pool_bm |= 1ULL << i;
@@ -1058,7 +1058,7 @@ int mlx4_assign_eq(struct mlx4_dev *dev, char* name, int * vector)
eq_set_ci(&priv->eq_table.eq[vec], 1);
}
}
- spin_unlock(&priv->msix_ctl.pool_lock);
+ mutex_unlock(&priv->msix_ctl.pool_lock);
if (vec) {
*vector = vec;
@@ -1079,13 +1079,13 @@ void mlx4_release_eq(struct mlx4_dev *dev, int vec)
if (likely(i >= 0)) {
/*sanity check , making sure were not trying to free irq's
Belonging to a legacy EQ*/
- spin_lock(&priv->msix_ctl.pool_lock);
+ mutex_lock(&priv->msix_ctl.pool_lock);
if (priv->msix_ctl.pool_bm & 1ULL << i) {
free_irq(priv->eq_table.eq[vec].irq,
&priv->eq_table.eq[vec]);
priv->msix_ctl.pool_bm &= ~(1ULL << i);
}
- spin_unlock(&priv->msix_ctl.pool_lock);
+ mutex_unlock(&priv->msix_ctl.pool_lock);
}
}