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authorIvan Khoronzhuk <ivan.khoronzhuk@linaro.org>2018-04-19 21:49:09 +0200
committerDavid S. Miller <davem@davemloft.net>2018-04-22 20:55:43 +0200
commit5e391dc5a8d801a2410d0032ad4a428d1d61800c (patch)
treef43e14fbf19c1b30cad6e76198097b8dfffd40dc /drivers/net/ethernet/ti
parentllc: delete timers synchronously in llc_sk_free() (diff)
downloadlinux-5e391dc5a8d801a2410d0032ad4a428d1d61800c.tar.xz
linux-5e391dc5a8d801a2410d0032ad4a428d1d61800c.zip
net: ethernet: ti: cpsw: fix tx vlan priority mapping
The CPDMA_TX_PRIORITY_MAP in real is vlan pcp field priority mapping register and basically replaces vlan pcp field for tagged packets. So, set it to be 1:1 mapping. Otherwise, it will cause unexpected change of egress vlan tagged packets, like prio 2 -> prio 5. Fixes: e05107e6b747 ("net: ethernet: ti: cpsw: add multi queue support") Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/ti')
-rw-r--r--drivers/net/ethernet/ti/cpsw.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 30371274409d..74f828412055 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -129,7 +129,7 @@ do { \
#define RX_PRIORITY_MAPPING 0x76543210
#define TX_PRIORITY_MAPPING 0x33221100
-#define CPDMA_TX_PRIORITY_MAP 0x01234567
+#define CPDMA_TX_PRIORITY_MAP 0x76543210
#define CPSW_VLAN_AWARE BIT(1)
#define CPSW_RX_VLAN_ENCAP BIT(2)