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| author | Alex Elder <elder@linaro.org> | 2023-01-30 22:01:54 +0100 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2023-02-01 06:45:51 +0100 |
| commit | 8e7c89d84a2b73cc66485f1749b5e4f8d3a62e6a (patch) | |
| tree | 1cc2b80ba072d66d7dd441792237b76b7141fdcd /drivers/net/ipa/ipa_table.c | |
| parent | net: ipa: define IPA v5.0+ registers (diff) | |
| download | linux-8e7c89d84a2b73cc66485f1749b5e4f8d3a62e6a.tar.xz linux-8e7c89d84a2b73cc66485f1749b5e4f8d3a62e6a.zip | |
net: ipa: update table cache flushing
Update the code that causes filter and router table caches to be
flushed so that it supports IPA versions 5.0+. It adds a comment in
ipa_hardware_config_hashing() that explains that cacheing does not
need to be enabled, just as before, because it's enabled by default.
(For the record, the FILT_ROUT_CACHE_CFG register would have been
used if we wanted to explicitly enable these.)
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ipa/ipa_table.c | 23 |
1 files changed, 16 insertions, 7 deletions
diff --git a/drivers/net/ipa/ipa_table.c b/drivers/net/ipa/ipa_table.c index b81e27b61354..32ed9fec2ca7 100644 --- a/drivers/net/ipa/ipa_table.c +++ b/drivers/net/ipa/ipa_table.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. - * Copyright (C) 2018-2022 Linaro Ltd. + * Copyright (C) 2018-2023 Linaro Ltd. */ #include <linux/types.h> @@ -359,13 +359,22 @@ int ipa_table_hash_flush(struct ipa *ipa) return -EBUSY; } - reg = ipa_reg(ipa, FILT_ROUT_HASH_FLUSH); - offset = ipa_reg_offset(reg); + if (ipa->version < IPA_VERSION_5_0) { + reg = ipa_reg(ipa, FILT_ROUT_HASH_FLUSH); + offset = ipa_reg_offset(reg); - val = ipa_reg_bit(reg, IPV6_ROUTER_HASH); - val |= ipa_reg_bit(reg, IPV6_FILTER_HASH); - val |= ipa_reg_bit(reg, IPV4_ROUTER_HASH); - val |= ipa_reg_bit(reg, IPV4_FILTER_HASH); + val = ipa_reg_bit(reg, IPV6_ROUTER_HASH); + val |= ipa_reg_bit(reg, IPV6_FILTER_HASH); + val |= ipa_reg_bit(reg, IPV4_ROUTER_HASH); + val |= ipa_reg_bit(reg, IPV4_FILTER_HASH); + } else { + reg = ipa_reg(ipa, FILT_ROUT_CACHE_FLUSH); + offset = ipa_reg_offset(reg); + + /* IPA v5.0+ uses a unified cache (both IPv4 and IPv6) */ + val = ipa_reg_bit(reg, ROUTER_CACHE); + val |= ipa_reg_bit(reg, FILTER_CACHE); + } ipa_cmd_register_write_add(trans, offset, val, val, false); |