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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-03-28 21:29:51 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-03-28 21:29:51 +0100 |
| commit | ed40d0c472b136682b2fcba05f89762859c7374f (patch) | |
| tree | 076b83a26bcd63d6158463735dd34c10bbc591dc /drivers/net/ixgbe/ixgbe_phy.h | |
| parent | [ARM] 5434/1: ARM: OMAP: Fix mailbox compile for 24xx (diff) | |
| parent | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6 (diff) | |
| download | linux-ed40d0c472b136682b2fcba05f89762859c7374f.tar.xz linux-ed40d0c472b136682b2fcba05f89762859c7374f.zip | |
Merge branch 'origin' into devel
Conflicts:
sound/soc/pxa/pxa2xx-i2s.c
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_phy.h')
| -rw-r--r-- | drivers/net/ixgbe/ixgbe_phy.h | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/drivers/net/ixgbe/ixgbe_phy.h b/drivers/net/ixgbe/ixgbe_phy.h index 43a97bc420f5..cc5f1b3287e1 100644 --- a/drivers/net/ixgbe/ixgbe_phy.h +++ b/drivers/net/ixgbe/ixgbe_phy.h @@ -1,7 +1,7 @@ /******************************************************************************* Intel 10 Gigabit PCI Express Linux driver - Copyright(c) 1999 - 2008 Intel Corporation. + Copyright(c) 1999 - 2009 Intel Corporation. This program is free software; you can redistribute it and/or modify it under the terms and conditions of the GNU General Public License, @@ -54,14 +54,15 @@ #define IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS 0x3 /* Bit-shift macros */ -#define IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT 12 -#define IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT 8 -#define IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT 4 +#define IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT 24 +#define IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT 16 +#define IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT 8 /* Vendor OUIs: format of OUI is 0x[byte0][byte1][byte2][00] */ #define IXGBE_SFF_VENDOR_OUI_TYCO 0x00407600 #define IXGBE_SFF_VENDOR_OUI_FTL 0x00906500 #define IXGBE_SFF_VENDOR_OUI_AVAGO 0x00176A00 +#define IXGBE_SFF_VENDOR_OUI_INTEL 0x001B2100 /* I2C SDA and SCL timing parameters for standard mode */ #define IXGBE_I2C_T_HD_STA 4 @@ -101,5 +102,12 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw); s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, u16 *list_offset, u16 *data_offset); - +s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 *data); +s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 data); +s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 *eeprom_data); +s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 eeprom_data); #endif /* _IXGBE_PHY_H_ */ |