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author | Iyappan Subramanian <isubramanian@apm.com> | 2016-07-26 02:12:40 +0200 |
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committer | David S. Miller <davem@davemloft.net> | 2016-07-26 06:51:43 +0200 |
commit | 43b3cf6634a4ae2eac3b6f08019db8f19a114811 (patch) | |
tree | 1220ab64af07b9651a4f5ab6348d20518a9986c1 /drivers/net/phy/Makefile | |
parent | drivers: net: xgene: Fix module unload crash - clkrst sequence (diff) | |
download | linux-43b3cf6634a4ae2eac3b6f08019db8f19a114811.tar.xz linux-43b3cf6634a4ae2eac3b6f08019db8f19a114811.zip |
drivers: net: phy: xgene: Add MDIO driver
Currently, SGMII based 1G rely on the hardware registers for link state
and sometimes it's not reliable. To get most accurate link state, this
interface has to use the MDIO bus to poll the PHY.
In X-Gene SoC, MDIO bus is shared across RGMII and SGMII based 1G
interfaces, so adding this driver to manage MDIO bus. This driver
registers the mdio bus and registers the PHYs connected to it.
Signed-off-by: Iyappan Subramanian <isubramanian@apm.com>
Tested-by: Fushen Chen <fchen@apm.com>
Tested-by: Toan Le <toanle@apm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/Makefile')
-rw-r--r-- | drivers/net/phy/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index 19e38a97963a..534dfa74d5a2 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -48,3 +48,4 @@ obj-$(CONFIG_MICROCHIP_PHY) += microchip.o obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o obj-$(CONFIG_INTEL_XWAY_PHY) += intel-xway.o obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o +obj-$(CONFIG_MDIO_XGENE) += mdio-xgene.o |