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authorStefan Sørensen <stefan.sorensen@spectralink.com>2014-06-27 12:05:30 +0200
committerDavid S. Miller <davem@davemloft.net>2014-07-02 03:52:53 +0200
commitad01577aeb92d7cc72bb945aeb28def3749065da (patch)
tree965b1ab7f068d387bdc8a5a4c6cf4807c1ca5a3e /drivers/net/phy/dp83640.c
parentdp83640: Program pulsewidth2 values of perout triggers 0 and 1 (diff)
downloadlinux-ad01577aeb92d7cc72bb945aeb28def3749065da.tar.xz
linux-ad01577aeb92d7cc72bb945aeb28def3749065da.zip
dp83640: Increase supported perout pins to 7
This patch increases the number of supported periodic output pins from 1 to 7. The last pin is reserved for sync. Signed-off-by: Stefan Sørensen <stefan.sorensen@spectralink.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/dp83640.c')
-rw-r--r--drivers/net/phy/dp83640.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
index fcd50b77999f..eabecff9b740 100644
--- a/drivers/net/phy/dp83640.c
+++ b/drivers/net/phy/dp83640.c
@@ -40,6 +40,7 @@
#define LAYER2 0x01
#define MAX_RXTS 64
#define N_EXT_TS 6
+#define N_PER_OUT 7
#define PSF_PTPVER 2
#define PSF_EVNT 0x4000
#define PSF_RX 0x2000
@@ -47,7 +48,6 @@
#define EXT_EVENT 1
#define CAL_EVENT 7
#define CAL_TRIGGER 7
-#define PER_TRIGGER 6
#define DP83640_N_PINS 12
#define MII_DP83640_MICR 0x11
@@ -300,23 +300,23 @@ static u64 phy2txts(struct phy_txts *p)
}
static int periodic_output(struct dp83640_clock *clock,
- struct ptp_clock_request *clkreq, bool on)
+ struct ptp_clock_request *clkreq, bool on,
+ int trigger)
{
struct dp83640_private *dp83640 = clock->chosen;
struct phy_device *phydev = dp83640->phydev;
u32 sec, nsec, pwidth;
- u16 gpio, ptp_trig, trigger, val;
+ u16 gpio, ptp_trig, val;
if (on) {
- gpio = 1 + ptp_find_pin(clock->ptp_clock, PTP_PF_PEROUT, 0);
+ gpio = 1 + ptp_find_pin(clock->ptp_clock, PTP_PF_PEROUT,
+ trigger);
if (gpio < 1)
return -EINVAL;
} else {
gpio = 0;
}
- trigger = PER_TRIGGER;
-
ptp_trig = TRIG_WR |
(trigger & TRIG_CSEL_MASK) << TRIG_CSEL_SHIFT |
(gpio & TRIG_GPIO_MASK) << TRIG_GPIO_SHIFT |
@@ -496,9 +496,9 @@ static int ptp_dp83640_enable(struct ptp_clock_info *ptp,
return 0;
case PTP_CLK_REQ_PEROUT:
- if (rq->perout.index != 0)
+ if (rq->perout.index >= N_PER_OUT)
return -EINVAL;
- return periodic_output(clock, rq, on);
+ return periodic_output(clock, rq, on, rq->perout.index);
default:
break;
@@ -949,7 +949,7 @@ static void dp83640_clock_init(struct dp83640_clock *clock, struct mii_bus *bus)
clock->caps.max_adj = 1953124;
clock->caps.n_alarm = 0;
clock->caps.n_ext_ts = N_EXT_TS;
- clock->caps.n_per_out = 1;
+ clock->caps.n_per_out = N_PER_OUT;
clock->caps.n_pins = DP83640_N_PINS;
clock->caps.pps = 0;
clock->caps.adjfreq = ptp_dp83640_adjfreq;