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authorBjarni Jonasson <bjarni.jonasson@microchip.com>2021-02-16 16:29:42 +0100
committerDavid S. Miller <davem@davemloft.net>2021-02-16 23:06:18 +0100
commit3cc2c646be0b22037f31c958e96c0544a073d108 (patch)
tree40fe972316a582963b5da395fe91ca605f23ad38 /drivers/net/phy/meson-gxl.c
parentMerge branch 'Fix-buggy-brport-flags-offload-for-SJA1105-DSA' (diff)
downloadlinux-3cc2c646be0b22037f31c958e96c0544a073d108.tar.xz
linux-3cc2c646be0b22037f31c958e96c0544a073d108.zip
net: phy: mscc: adding LCPLL reset to VSC8514
At Power-On Reset, transients may cause the LCPLL to lock onto a clock that is momentarily unstable. This is normally seen in QSGMII setups where the higher speed 6G SerDes is being used. This patch adds an initial LCPLL Reset to the PHY (first instance) to avoid this issue. Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/meson-gxl.c')
0 files changed, 0 insertions, 0 deletions