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author | Richard Leitner <richard.leitner@skidata.com> | 2017-12-11 13:16:59 +0100 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2017-12-13 17:22:54 +0100 |
commit | 7f64e5b18ebb673cec2df334b8e0bda77df10376 (patch) | |
tree | bffb0dc44c41d16b4dcf8d9b2377fcb160de944d /drivers/net/phy/smsc.c | |
parent | phylib: add reset after clk enable support (diff) | |
download | linux-7f64e5b18ebb673cec2df334b8e0bda77df10376.tar.xz linux-7f64e5b18ebb673cec2df334b8e0bda77df10376.zip |
net: phy: smsc: LAN8710/20: add PHY_RST_AFTER_CLK_EN flag
The Microchip/SMSC LAN8710/LAN8720 PHYs need (according to their
datasheet [1]) a continuous REF_CLK when configured to "REF_CLK In Mode".
Therefore set the PHY_RST_AFTER_CLK_EN flag for those PHYs to let the
ETH driver reset them after the REF_CLK is enabled.
[1] http://ww1.microchip.com/downloads/en/DeviceDoc/00002165B.pdf
Signed-off-by: Richard Leitner <richard.leitner@skidata.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/smsc.c')
-rw-r--r-- | drivers/net/phy/smsc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c index a1961ba87e2b..be399d645224 100644 --- a/drivers/net/phy/smsc.c +++ b/drivers/net/phy/smsc.c @@ -312,7 +312,7 @@ static struct phy_driver smsc_phy_driver[] = { .name = "SMSC LAN8710/LAN8720", .features = PHY_BASIC_FEATURES, - .flags = PHY_HAS_INTERRUPT, + .flags = PHY_HAS_INTERRUPT | PHY_RST_AFTER_CLK_EN, .probe = smsc_phy_probe, |