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authorRussell King <rmk+kernel@armlinux.org.uk>2017-07-25 16:03:34 +0200
committerDavid S. Miller <davem@davemloft.net>2017-08-07 05:55:29 +0200
commitda7c1862f05842236490a8e65cc6f57d8160c05d (patch)
tree189ba4a959356fbf57916a46afd0c63b869375f0 /drivers/net/phy
parentphylink: add support for MII ioctl access to Clause 45 PHYs (diff)
downloadlinux-da7c1862f05842236490a8e65cc6f57d8160c05d.tar.xz
linux-da7c1862f05842236490a8e65cc6f57d8160c05d.zip
phylink: add in-band autonegotiation support for 10GBase-KR mode.
Add in-band autonegotation support for 10GBase-KR mode. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/phylink.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index dc0f4d7b7dd2..32917bdd1432 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -266,6 +266,23 @@ static int phylink_parse_mode(struct phylink *pl, struct device_node *np)
pl->link_an_mode = MLO_AN_8023Z;
break;
+ case PHY_INTERFACE_MODE_10GKR:
+ phylink_set(pl->supported, 10baseT_Half);
+ phylink_set(pl->supported, 10baseT_Full);
+ phylink_set(pl->supported, 100baseT_Half);
+ phylink_set(pl->supported, 100baseT_Full);
+ phylink_set(pl->supported, 1000baseT_Half);
+ phylink_set(pl->supported, 1000baseT_Full);
+ phylink_set(pl->supported, 1000baseX_Full);
+ phylink_set(pl->supported, 10000baseKR_Full);
+ phylink_set(pl->supported, 10000baseCR_Full);
+ phylink_set(pl->supported, 10000baseSR_Full);
+ phylink_set(pl->supported, 10000baseLR_Full);
+ phylink_set(pl->supported, 10000baseLRM_Full);
+ phylink_set(pl->supported, 10000baseER_Full);
+ pl->link_an_mode = MLO_AN_SGMII;
+ break;
+
default:
netdev_err(pl->netdev,
"incorrect link mode %s for in-band status\n",