diff options
| author | Geoff Levand <geoff@infradead.org> | 2011-07-15 01:03:29 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2011-07-15 01:03:29 +0200 |
| commit | ecae42d37045ec71831d0e0e493e00b0e0732edd (patch) | |
| tree | 5f02677e563e83f2296ebb8632f7eecb57e15fea /drivers/net/ps3_gelic_net.c | |
| parent | bnx2x: Multiple concurrent l2 traffic classes (diff) | |
| download | linux-ecae42d37045ec71831d0e0e493e00b0e0732edd.tar.xz linux-ecae42d37045ec71831d0e0e493e00b0e0732edd.zip | |
net/ps3: Fix gelic RX DMA restart
Fix the condition where PS3 network RX hangs when no network
TX is occurring by calling gelic_card_enable_rxdmac() during
RX_DMA_CHAIN_END event processing.
The gelic hardware automatically clears its RX_DMA_EN flag when
it detects an RX_DMA_CHAIN_END event. In its processing of
RX_DMA_CHAIN_END the gelic driver is required to set RX_DMA_EN
(with a call to gelic_card_enable_rxdmac()) to restart RX DMA
transfers. The existing gelic driver code does not set
RX_DMA_EN directly in its processing of the RX_DMA_CHAIN_END
event, but uses a flag variable card->rx_dma_restart_required
to schedule the setting of RX_DMA_EN until next inside the
interrupt handler.
It seems this delayed setting of RX_DMA_EN causes the hang since
the next RX interrupt after the RX_DMA_CHAIN_END event where
RX_DMA_EN is scheduled to be set will not occur since RX_DMA_EN
was not set. In the case were network TX is occuring, RX_DMA_EN
is set in the next TX interrupt and RX processing continues.
Signed-off-by: Geoff Levand <geoff@infradead.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ps3_gelic_net.c')
| -rw-r--r-- | drivers/net/ps3_gelic_net.c | 21 |
1 files changed, 8 insertions, 13 deletions
diff --git a/drivers/net/ps3_gelic_net.c b/drivers/net/ps3_gelic_net.c index 4acc17bffc42..d82a82d9870c 100644 --- a/drivers/net/ps3_gelic_net.c +++ b/drivers/net/ps3_gelic_net.c @@ -993,10 +993,6 @@ static int gelic_card_decode_one_descr(struct gelic_card *card) int dmac_chain_ended; status = gelic_descr_get_status(descr); - /* is this descriptor terminated with next_descr == NULL? */ - dmac_chain_ended = - be32_to_cpu(descr->dmac_cmd_status) & - GELIC_DESCR_RX_DMA_CHAIN_END; if (status == GELIC_DESCR_DMA_CARDOWNED) return 0; @@ -1059,6 +1055,11 @@ static int gelic_card_decode_one_descr(struct gelic_card *card) /* ok, we've got a packet in descr */ gelic_net_pass_skb_up(descr, card, netdev); refill: + + /* is the current descriptor terminated with next_descr == NULL? */ + dmac_chain_ended = + be32_to_cpu(descr->dmac_cmd_status) & + GELIC_DESCR_RX_DMA_CHAIN_END; /* * So that always DMAC can see the end * of the descriptor chain to avoid @@ -1087,10 +1088,9 @@ refill: * If dmac chain was met, DMAC stopped. * thus re-enable it */ - if (dmac_chain_ended) { - card->rx_dma_restart_required = 1; - dev_dbg(ctodev(card), "reenable rx dma scheduled\n"); - } + + if (dmac_chain_ended) + gelic_card_enable_rxdmac(card); return 1; } @@ -1156,11 +1156,6 @@ static irqreturn_t gelic_card_interrupt(int irq, void *ptr) status &= card->irq_mask; - if (card->rx_dma_restart_required) { - card->rx_dma_restart_required = 0; - gelic_card_enable_rxdmac(card); - } - if (status & GELIC_CARD_RXINT) { gelic_card_rx_irq_off(card); napi_schedule(&card->napi); |