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authorBen Hutchings <bhutchings@solarflare.com>2009-11-29 16:08:21 +0100
committerDavid S. Miller <davem@davemloft.net>2009-11-30 02:23:52 +0100
commit5784946068f81c5f1cce2906a7655652e34f44f3 (patch)
tree76fd9e21bc8765b8306621f2ace6a65fad99fed7 /drivers/net/sfc/falcon.c
parentmv643xx: convert to netdev_tx_t (diff)
downloadlinux-5784946068f81c5f1cce2906a7655652e34f44f3.tar.xz
linux-5784946068f81c5f1cce2906a7655652e34f44f3.zip
sfc: Fold falcon_probe_nic_variant() into falcon_probe_nic()
falcon_probe_nic_variant() does a lot less than it used to, and a lot less than it claims to. Fold the remainder into its caller. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/falcon.c')
-rw-r--r--drivers/net/sfc/falcon.c64
1 files changed, 24 insertions, 40 deletions
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c
index 2e4c71114630..63e6734d8341 100644
--- a/drivers/net/sfc/falcon.c
+++ b/drivers/net/sfc/falcon.c
@@ -2806,40 +2806,6 @@ u32 efx_nic_fpga_ver(struct efx_nic *efx)
return EFX_OWORD_FIELD(altera_build, FRF_AZ_ALTERA_BUILD_VER);
}
-/* Probe the NIC variant (revision, ASIC vs FPGA, function count, port
- * count, port speed). Set workaround and feature flags accordingly.
- */
-static int falcon_probe_nic_variant(struct efx_nic *efx)
-{
- efx_oword_t nic_stat;
-
- if (efx_nic_fpga_ver(efx) != 0) {
- EFX_ERR(efx, "Falcon FPGA not supported\n");
- return -ENODEV;
- }
-
- efx_reado(efx, &nic_stat, FR_AB_NIC_STAT);
-
- if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1) {
- u8 pci_rev = efx->pci_dev->revision;
-
- if ((pci_rev == 0xff) || (pci_rev == 0)) {
- EFX_ERR(efx, "Falcon rev A0 not supported\n");
- return -ENODEV;
- }
- if (EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_10G) == 0) {
- EFX_ERR(efx, "Falcon rev A1 1G not supported\n");
- return -ENODEV;
- }
- if (EFX_OWORD_FIELD(nic_stat, FRF_AA_STRAP_PCIE) == 0) {
- EFX_ERR(efx, "Falcon rev A1 PCI-X not supported\n");
- return -ENODEV;
- }
- }
-
- return 0;
-}
-
/* Probe all SPI devices on the NIC */
static void falcon_probe_spi_devices(struct efx_nic *efx)
{
@@ -2891,15 +2857,33 @@ static int falcon_probe_nic(struct efx_nic *efx)
return -ENOMEM;
efx->nic_data = nic_data;
- /* Determine number of ports etc. */
- rc = falcon_probe_nic_variant(efx);
- if (rc)
+ rc = -ENODEV;
+
+ if (efx_nic_fpga_ver(efx) != 0) {
+ EFX_ERR(efx, "Falcon FPGA not supported\n");
goto fail1;
+ }
+
+ if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1) {
+ efx_oword_t nic_stat;
+ struct pci_dev *dev;
+ u8 pci_rev = efx->pci_dev->revision;
- /* Probe secondary function if expected */
- if (efx_nic_is_dual_func(efx)) {
- struct pci_dev *dev = pci_dev_get(efx->pci_dev);
+ if ((pci_rev == 0xff) || (pci_rev == 0)) {
+ EFX_ERR(efx, "Falcon rev A0 not supported\n");
+ goto fail1;
+ }
+ efx_reado(efx, &nic_stat, FR_AB_NIC_STAT);
+ if (EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_10G) == 0) {
+ EFX_ERR(efx, "Falcon rev A1 1G not supported\n");
+ goto fail1;
+ }
+ if (EFX_OWORD_FIELD(nic_stat, FRF_AA_STRAP_PCIE) == 0) {
+ EFX_ERR(efx, "Falcon rev A1 PCI-X not supported\n");
+ goto fail1;
+ }
+ dev = pci_dev_get(efx->pci_dev);
while ((dev = pci_get_device(EFX_VENDID_SFC, FALCON_A_S_DEVID,
dev))) {
if (dev->bus == efx->pci_dev->bus &&