diff options
| author | Matt Carlson <mcarlson@broadcom.com> | 2010-09-15 10:59:57 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-09-15 23:16:13 +0200 |
| commit | 6fd45cb814709767a1704b541aa91647b7f275cf (patch) | |
| tree | 1d6ee9a9b703ba22713f239cf0da35b3e6f5ad69 /drivers/net/tg3.c | |
| parent | tg3: Unlock 5717 B0+ support (diff) | |
| download | linux-6fd45cb814709767a1704b541aa91647b7f275cf.tar.xz linux-6fd45cb814709767a1704b541aa91647b7f275cf.zip | |
tg3: Clarify semantics of TG3_IRQ_MAX_VECS
TG3_IRQ_MAX_VECS should be seen as the maximum number of vectors that
any device could be expected to use. tp->irq_max represents the maximum
number of vectors the current device can use. This patch clarifies the
semantics of the code to match the above description.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
| -rw-r--r-- | drivers/net/tg3.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 4e92b81bccfa..7468479902ae 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -7564,7 +7564,7 @@ static void tg3_rings_reset(struct tg3 *tp) /* Zero mailbox registers. */ if (tp->tg3_flags & TG3_FLAG_SUPPORT_MSIX) { - for (i = 1; i < TG3_IRQ_MAX_VECS; i++) { + for (i = 1; i < tp->irq_max; i++) { tp->napi[i].tx_prod = 0; tp->napi[i].tx_cons = 0; if (tp->tg3_flags3 & TG3_FLG3_ENABLE_TSS) @@ -9886,7 +9886,7 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e tp->rx_pending = 63; tp->rx_jumbo_pending = ering->rx_jumbo_pending; - for (i = 0; i < TG3_IRQ_MAX_VECS; i++) + for (i = 0; i < tp->irq_max; i++) tp->napi[i].tx_pending = ering->tx_pending; if (netif_running(dev)) { @@ -14598,7 +14598,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, intmbx = MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW; rcvmbx = MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW; sndmbx = MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW; - for (i = 0; i < TG3_IRQ_MAX_VECS; i++) { + for (i = 0; i < tp->irq_max; i++) { struct tg3_napi *tnapi = &tp->napi[i]; tnapi->tp = tp; |