diff options
| author | Andy Fleming <afleming@freescale.com> | 2009-02-05 01:42:12 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-02-05 01:42:35 +0100 |
| commit | 1577ecef766650a57fceb171acee2b13cbfaf1d3 (patch) | |
| tree | b66df11d8815f95f815e65c3c3ffd32df81b8d43 /drivers/net/ucc_geth.h | |
| parent | virtio_net: Allow setting the MAC address of the NIC (diff) | |
| download | linux-1577ecef766650a57fceb171acee2b13cbfaf1d3.tar.xz linux-1577ecef766650a57fceb171acee2b13cbfaf1d3.zip | |
netdev: Merge UCC and gianfar MDIO bus drivers
The MDIO bus drivers for the UCC and gianfar ethernet controllers are
essentially the same. There's no reason to duplicate that much code.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ucc_geth.h')
| -rw-r--r-- | drivers/net/ucc_geth.h | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h index 16cbe42ba43c..66d18971fa0c 100644 --- a/drivers/net/ucc_geth.h +++ b/drivers/net/ucc_geth.h @@ -28,8 +28,6 @@ #include <asm/ucc.h> #include <asm/ucc_fast.h> -#include "ucc_geth_mii.h" - #define DRV_DESC "QE UCC Gigabit Ethernet Controller" #define DRV_NAME "ucc_geth" #define DRV_VERSION "1.1" @@ -184,6 +182,18 @@ struct ucc_geth { #define UCCE_RX_EVENTS (UCCE_RXF | UCC_GETH_UCCE_BSY) #define UCCE_TX_EVENTS (UCCE_TXB | UCC_GETH_UCCE_TXE) +/* TBI defines */ +#define ENET_TBI_MII_CR 0x00 /* Control */ +#define ENET_TBI_MII_SR 0x01 /* Status */ +#define ENET_TBI_MII_ANA 0x04 /* AN advertisement */ +#define ENET_TBI_MII_ANLPBPA 0x05 /* AN link partner base page ability */ +#define ENET_TBI_MII_ANEX 0x06 /* AN expansion */ +#define ENET_TBI_MII_ANNPT 0x07 /* AN next page transmit */ +#define ENET_TBI_MII_ANLPANP 0x08 /* AN link partner ability next page */ +#define ENET_TBI_MII_EXST 0x0F /* Extended status */ +#define ENET_TBI_MII_JD 0x10 /* Jitter diagnostics */ +#define ENET_TBI_MII_TBICON 0x11 /* TBI control */ + /* UCC GETH MACCFG1 (MAC Configuration 1 Register) */ #define MACCFG1_FLOW_RX 0x00000020 /* Flow Control Rx */ |