diff options
| author | Vasanthakumar Thiagarajan <vthiagar@qca.qualcomm.com> | 2012-05-22 09:22:48 +0200 |
|---|---|---|
| committer | Kalle Valo <kvalo@qca.qualcomm.com> | 2012-05-24 09:11:06 +0200 |
| commit | fa338be062e31141a8dadd822a98f558785c8818 (patch) | |
| tree | 626d6ce96aab114ad7c5098edae9c9d35e976fa2 /drivers/net/wireless/ath/ath6kl | |
| parent | ath6kl: issue wmi disconnect after notifying cfg80211 (diff) | |
| download | linux-fa338be062e31141a8dadd822a98f558785c8818.tar.xz linux-fa338be062e31141a8dadd822a98f558785c8818.zip | |
ath6kl: Fix missing gpio pin 9 configuration
GPIO pin 9 also needs to be configured along with other gpio
pins to avoid sdio crc errors. I've not experienced any issue
with missing this particular gpio pin configuration, found dunring
code review. This can potentially improve rx performance.
Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath6kl')
| -rw-r--r-- | drivers/net/wireless/ath/ath6kl/init.c | 6 | ||||
| -rw-r--r-- | drivers/net/wireless/ath/ath6kl/target.h | 1 |
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath6kl/init.c b/drivers/net/wireless/ath/ath6kl/init.c index 10de1322e702..241febcd7f7c 100644 --- a/drivers/net/wireless/ath/ath6kl/init.c +++ b/drivers/net/wireless/ath/ath6kl/init.c @@ -1392,6 +1392,12 @@ static int ath6kl_init_upload(struct ath6kl *ar) ar->version.target_ver == AR6003_HW_2_1_1_VERSION) { ath6kl_err("temporary war to avoid sdio crc error\n"); + param = 0x28; + address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS; + status = ath6kl_bmi_reg_write(ar, address, param); + if (status) + return status; + param = 0x20; address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; diff --git a/drivers/net/wireless/ath/ath6kl/target.h b/drivers/net/wireless/ath/ath6kl/target.h index 78e0ef4567a5..a98c12ba70c1 100644 --- a/drivers/net/wireless/ath/ath6kl/target.h +++ b/drivers/net/wireless/ath/ath6kl/target.h @@ -45,6 +45,7 @@ #define LPO_CAL_ENABLE_S 20 #define LPO_CAL_ENABLE 0x00100000 +#define GPIO_PIN9_ADDRESS 0x0000004c #define GPIO_PIN10_ADDRESS 0x00000050 #define GPIO_PIN11_ADDRESS 0x00000054 #define GPIO_PIN12_ADDRESS 0x00000058 |