diff options
| author | Matt Carlson <mcarlson@broadcom.com> | 2008-05-03 01:48:36 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-05-03 01:48:36 +0200 |
| commit | fd1122a2593d0bbe19856e3943c859ebfe563583 (patch) | |
| tree | 75be50b8a959ef7f772612643d5d60104e9ccceb /drivers/net | |
| parent | tg3: Use constant 500KHz MI clock on adapters with a CPMU (diff) | |
| download | linux-fd1122a2593d0bbe19856e3943c859ebfe563583.tar.xz linux-fd1122a2593d0bbe19856e3943c859ebfe563583.zip | |
tg3: Fix 5761 NVRAM sizes
The 5761 NVRAM sizes assigned to the nvram_size member are half as big
as they should be. This patch corrects the NVRAM sizes and replaces
the hardcoded constants with preprocessor constants for readability.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/tg3.c | 31 | ||||
| -rw-r--r-- | drivers/net/tg3.h | 11 |
2 files changed, 29 insertions, 13 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index e0dc31fdf844..b17812491b8a 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -9894,7 +9894,7 @@ static void __devinit tg3_get_nvram_size(struct tg3 *tp) return; } } - tp->nvram_size = 0x80000; + tp->nvram_size = TG3_NVRAM_SIZE_512KB; } static void __devinit tg3_get_nvram_info(struct tg3 *tp) @@ -10035,11 +10035,14 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp) tp->nvram_pagesize = 264; if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_1 || nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_5) - tp->nvram_size = (protect ? 0x3e200 : 0x80000); + tp->nvram_size = (protect ? 0x3e200 : + TG3_NVRAM_SIZE_512KB); else if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_2) - tp->nvram_size = (protect ? 0x1f200 : 0x40000); + tp->nvram_size = (protect ? 0x1f200 : + TG3_NVRAM_SIZE_256KB); else - tp->nvram_size = (protect ? 0x1f200 : 0x20000); + tp->nvram_size = (protect ? 0x1f200 : + TG3_NVRAM_SIZE_128KB); break; case FLASH_5752VENDOR_ST_M45PE10: case FLASH_5752VENDOR_ST_M45PE20: @@ -10049,11 +10052,17 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp) tp->tg3_flags2 |= TG3_FLG2_FLASH; tp->nvram_pagesize = 256; if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE10) - tp->nvram_size = (protect ? 0x10000 : 0x20000); + tp->nvram_size = (protect ? + TG3_NVRAM_SIZE_64KB : + TG3_NVRAM_SIZE_128KB); else if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE20) - tp->nvram_size = (protect ? 0x10000 : 0x40000); + tp->nvram_size = (protect ? + TG3_NVRAM_SIZE_64KB : + TG3_NVRAM_SIZE_256KB); else - tp->nvram_size = (protect ? 0x20000 : 0x80000); + tp->nvram_size = (protect ? + TG3_NVRAM_SIZE_128KB : + TG3_NVRAM_SIZE_512KB); break; } } @@ -10147,25 +10156,25 @@ static void __devinit tg3_get_5761_nvram_info(struct tg3 *tp) case FLASH_5761VENDOR_ATMEL_MDB161D: case FLASH_5761VENDOR_ST_A_M45PE16: case FLASH_5761VENDOR_ST_M_M45PE16: - tp->nvram_size = 0x100000; + tp->nvram_size = TG3_NVRAM_SIZE_2MB; break; case FLASH_5761VENDOR_ATMEL_ADB081D: case FLASH_5761VENDOR_ATMEL_MDB081D: case FLASH_5761VENDOR_ST_A_M45PE80: case FLASH_5761VENDOR_ST_M_M45PE80: - tp->nvram_size = 0x80000; + tp->nvram_size = TG3_NVRAM_SIZE_1MB; break; case FLASH_5761VENDOR_ATMEL_ADB041D: case FLASH_5761VENDOR_ATMEL_MDB041D: case FLASH_5761VENDOR_ST_A_M45PE40: case FLASH_5761VENDOR_ST_M_M45PE40: - tp->nvram_size = 0x40000; + tp->nvram_size = TG3_NVRAM_SIZE_512KB; break; case FLASH_5761VENDOR_ATMEL_ADB021D: case FLASH_5761VENDOR_ATMEL_MDB021D: case FLASH_5761VENDOR_ST_A_M45PE20: case FLASH_5761VENDOR_ST_M_M45PE20: - tp->nvram_size = 0x20000; + tp->nvram_size = TG3_NVRAM_SIZE_256KB; break; } } diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index ce2be3a96175..bf387ff9bc15 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h @@ -2576,6 +2576,13 @@ struct tg3 { int nvram_lock_cnt; u32 nvram_size; +#define TG3_NVRAM_SIZE_64KB 0x00010000 +#define TG3_NVRAM_SIZE_128KB 0x00020000 +#define TG3_NVRAM_SIZE_256KB 0x00040000 +#define TG3_NVRAM_SIZE_512KB 0x00080000 +#define TG3_NVRAM_SIZE_1MB 0x00100000 +#define TG3_NVRAM_SIZE_2MB 0x00200000 + u32 nvram_pagesize; u32 nvram_jedecnum; @@ -2584,10 +2591,10 @@ struct tg3 { #define JEDEC_SAIFUN 0x4f #define JEDEC_SST 0xbf -#define ATMEL_AT24C64_CHIP_SIZE (64 * 1024) +#define ATMEL_AT24C64_CHIP_SIZE TG3_NVRAM_SIZE_64KB #define ATMEL_AT24C64_PAGE_SIZE (32) -#define ATMEL_AT24C512_CHIP_SIZE (512 * 1024) +#define ATMEL_AT24C512_CHIP_SIZE TG3_NVRAM_SIZE_512KB #define ATMEL_AT24C512_PAGE_SIZE (128) #define ATMEL_AT45DB0X1B_PAGE_POS 9 |