diff options
| author | Matt Carlson <mcarlson@broadcom.com> | 2009-11-02 15:31:11 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-11-03 08:39:12 +0100 |
| commit | cdd4e09d692bd4f3457b3789279005e112b7696d (patch) | |
| tree | 25a7619a2cd9dc2ab787fd768bda96c8f507243d /drivers/net | |
| parent | tg3 / broadcom: Add PHY_BRCM_CLEAR_RGMII_MODE flag (diff) | |
| download | linux-cdd4e09d692bd4f3457b3789279005e112b7696d.tar.xz linux-cdd4e09d692bd4f3457b3789279005e112b7696d.zip | |
tg3 / broadcom: Refine AC131 APD support
Auto power-down (APD) support is a power-saving feature. It should be
selectively enabled since it might expose MAC bugs. This patch changes
the code to enable APD only if the PHY_BRCM_AUTO_PWRDWN_ENABLE flag is
set. The tg3 driver was changed to set this bit.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/phy/broadcom.c | 8 | ||||
| -rw-r--r-- | drivers/net/tg3.c | 1 |
2 files changed, 6 insertions, 3 deletions
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 5d2a2e90aba8..bddf4a42ae68 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c @@ -561,9 +561,11 @@ static int brcm_fet_config_init(struct phy_device *phydev) if (err < 0) goto done; - /* Enable auto power down */ - err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_AUXSTAT2, - MII_BRCM_FET_SHDW_AS2_APDE); + if (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE) { + /* Enable auto power down */ + err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_AUXSTAT2, + MII_BRCM_FET_SHDW_AS2_APDE); + } done: /* Disable shadow register access */ diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index e7128f6ae2d8..592b5bf09e40 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -1114,6 +1114,7 @@ static int tg3_mdio_init(struct tg3 *tp) case TG3_PHY_ID_RTL8201E: case TG3_PHY_ID_BCMAC131: phydev->interface = PHY_INTERFACE_MODE_MII; + phydev->dev_flags |= PHY_BRCM_AUTO_PWRDWN_ENABLE; tp->tg3_flags3 |= TG3_FLG3_PHY_IS_FET; break; } |