diff options
| author | Richard Cochran <richardcochran@gmail.com> | 2014-03-20 22:21:57 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-03-21 19:21:14 +0100 |
| commit | 564ca56e45469f48703b1de72ac64d143d18d0ee (patch) | |
| tree | a11d91831d130e9d7c9ab4c7211de0d1f976ef1a /drivers/net | |
| parent | dp83640: trivial fixes (diff) | |
| download | linux-564ca56e45469f48703b1de72ac64d143d18d0ee.tar.xz linux-564ca56e45469f48703b1de72ac64d143d18d0ee.zip | |
dp83640: correct the periodic output frequency
The phyter driver incorrectly feeds the value of the period into what
is in fact a pulse width register, resulting in the actual period
being twice the dialed value. This patch fixes the issue and renames a
variable to make the code at bit more clear.
Signed-off-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/phy/dp83640.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c index d6c106113932..9e265553e8e4 100644 --- a/drivers/net/phy/dp83640.c +++ b/drivers/net/phy/dp83640.c @@ -271,7 +271,7 @@ static void periodic_output(struct dp83640_clock *clock, { struct dp83640_private *dp83640 = clock->chosen; struct phy_device *phydev = dp83640->phydev; - u32 sec, nsec, period; + u32 sec, nsec, pwidth; u16 gpio, ptp_trig, trigger, val; gpio = on ? gpio_tab[PEROUT_GPIO] : 0; @@ -296,8 +296,9 @@ static void periodic_output(struct dp83640_clock *clock, sec = clkreq->perout.start.sec; nsec = clkreq->perout.start.nsec; - period = clkreq->perout.period.sec * 1000000000UL; - period += clkreq->perout.period.nsec; + pwidth = clkreq->perout.period.sec * 1000000000UL; + pwidth += clkreq->perout.period.nsec; + pwidth /= 2; mutex_lock(&clock->extreg_lock); @@ -310,8 +311,8 @@ static void periodic_output(struct dp83640_clock *clock, ext_write(0, phydev, PAGE4, PTP_TDR, nsec >> 16); /* ns[31:16] */ ext_write(0, phydev, PAGE4, PTP_TDR, sec & 0xffff); /* sec[15:0] */ ext_write(0, phydev, PAGE4, PTP_TDR, sec >> 16); /* sec[31:16] */ - ext_write(0, phydev, PAGE4, PTP_TDR, period & 0xffff); /* ns[15:0] */ - ext_write(0, phydev, PAGE4, PTP_TDR, period >> 16); /* ns[31:16] */ + ext_write(0, phydev, PAGE4, PTP_TDR, pwidth & 0xffff); /* ns[15:0] */ + ext_write(0, phydev, PAGE4, PTP_TDR, pwidth >> 16); /* ns[31:16] */ /*enable trigger*/ val &= ~TRIG_LOAD; |