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| author | Mark A. Greer <mgreer@animalcreek.com> | 2014-03-25 16:54:29 +0100 |
|---|---|---|
| committer | Samuel Ortiz <sameo@linux.intel.com> | 2014-04-22 00:37:26 +0200 |
| commit | 5fa3af352b991e2e5c674728411d1cc4a4923e4d (patch) | |
| tree | e9b83ddf57f8cd5e800341fd9ef1c52154c5dc23 /drivers/nfc/trf7970a.c | |
| parent | NFC: pn544: i2c: Add DTS Documentation (diff) | |
| download | linux-5fa3af352b991e2e5c674728411d1cc4a4923e4d.tar.xz linux-5fa3af352b991e2e5c674728411d1cc4a4923e4d.zip | |
NFC: trf7970a: Increase TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT to 20 ms
After further testing periods of ~16 ms have been observed
between interrupts indicating that there is receive data in
the FIFO. To accomodate that, increase the time the driver
waits before deciding there is no more data to receive to
20 ms. The macro that represents that delay is
'TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT'.
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to '')
| -rw-r--r-- | drivers/nfc/trf7970a.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/nfc/trf7970a.c b/drivers/nfc/trf7970a.c index d9babe986473..9c93fbef4964 100644 --- a/drivers/nfc/trf7970a.c +++ b/drivers/nfc/trf7970a.c @@ -67,14 +67,14 @@ * only the SRX bit set, it means that all of the data has been received * (once what's in the fifo has been read). However, depending on timing * an interrupt status with only the SRX bit set may not be recived. In - * those cases, the timeout mechanism is used to wait 5 ms in case more - * data arrives. After 5 ms, it is assumed that all of the data has been + * those cases, the timeout mechanism is used to wait 20 ms in case more + * data arrives. After 20 ms, it is assumed that all of the data has been * received and the accumulated rx data is sent upstream. The * 'TRF7970A_ST_WAIT_FOR_RX_DATA_CONT' state is used for this purpose * (i.e., it indicates that some data has been received but we're not sure * if there is more coming so a timeout in this state means all data has - * been received and there isn't an error). The delay is 5 ms since delays - * over 2 ms have been observed during testing (a little extra just in case). + * been received and there isn't an error). The delay is 20 ms since delays + * of ~16 ms have been observed during testing. * * Type 2 write and sector select commands respond with a 4-bit ACK or NACK. * Having only 4 bits in the FIFO won't normally generate an interrupt so @@ -120,7 +120,7 @@ /* TX length is 3 nibbles long ==> 4KB - 1 bytes max */ #define TRF7970A_TX_MAX (4096 - 1) -#define TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT 5 +#define TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT 20 #define TRF7970A_WAIT_FOR_FIFO_DRAIN_TIMEOUT 3 #define TRF7970A_WAIT_TO_ISSUE_ISO15693_EOF 20 |