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authorBen Hutchings <ben.hutchings@codethink.co.uk>2017-05-09 19:00:43 +0200
committerDan Williams <dan.j.williams@intel.com>2017-05-09 19:09:26 +0200
commit8376efd31d3d7c44bd05be337adde023cc531fa1 (patch)
treea058fa06362f801e82408c20f5d681b7dfcc8a54 /drivers/nvdimm/btt_devs.c
parentdevice-dax: kill NR_DEV_DAX (diff)
downloadlinux-8376efd31d3d7c44bd05be337adde023cc531fa1.tar.xz
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x86, pmem: Fix cache flushing for iovec write < 8 bytes
Commit 11e63f6d920d added cache flushing for unaligned writes from an iovec, covering the first and last cache line of a >= 8 byte write and the first cache line of a < 8 byte write. But an unaligned write of 2-7 bytes can still cover two cache lines, so make sure we flush both in that case. Cc: <stable@vger.kernel.org> Fixes: 11e63f6d920d ("x86, pmem: fix broken __copy_user_nocache ...") Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/nvdimm/btt_devs.c')
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