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authorRoss Zwisler <ross.zwisler@linux.intel.com>2018-06-06 18:45:15 +0200
committerDan Williams <dan.j.williams@intel.com>2018-06-06 20:02:32 +0200
commit546eb0317cfa3c4f9e1d9ab892766d65d7f78fad (patch)
treebd07bde17c89b06bdf2bcf337b701c7cb3f0da9e /drivers/nvdimm
parentlibnvdimm, pmem: Unconditionally deep flush on *sync (diff)
downloadlinux-546eb0317cfa3c4f9e1d9ab892766d65d7f78fad.tar.xz
linux-546eb0317cfa3c4f9e1d9ab892766d65d7f78fad.zip
libnvdimm, pmem: Do not flush power-fail protected CPU caches
This commit: 5fdf8e5ba566 ("libnvdimm: re-enable deep flush for pmem devices via fsync()") intended to make sure that deep flush was always available even on platforms which support a power-fail protected CPU cache. An unintended side effect of this change was that we also lost the ability to skip flushing CPU caches on those power-fail protected CPU cache. Fix this by skipping the low level cache flushing in dax_flush() if we have CPU caches which are power-fail protected. The user can still override this behavior by manually setting the write_cache state of a namespace. See libndctl's ndctl_namespace_write_cache_is_enabled(), ndctl_namespace_enable_write_cache() and ndctl_namespace_disable_write_cache() functions. Cc: <stable@vger.kernel.org> Fixes: 5fdf8e5ba566 ("libnvdimm: re-enable deep flush for pmem devices via fsync()") Signed-off-by: Ross Zwisler <ross.zwisler@linux.intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/nvdimm')
-rw-r--r--drivers/nvdimm/region_devs.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/nvdimm/region_devs.c b/drivers/nvdimm/region_devs.c
index a612be6f019d..ec3543b83330 100644
--- a/drivers/nvdimm/region_devs.c
+++ b/drivers/nvdimm/region_devs.c
@@ -1132,7 +1132,8 @@ EXPORT_SYMBOL_GPL(nvdimm_has_flush);
int nvdimm_has_cache(struct nd_region *nd_region)
{
- return is_nd_pmem(&nd_region->dev);
+ return is_nd_pmem(&nd_region->dev) &&
+ !test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags);
}
EXPORT_SYMBOL_GPL(nvdimm_has_cache);