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authorBen Widawsky <ben.widawsky@intel.com>2022-01-24 01:29:53 +0100
committerDan Williams <dan.j.williams@intel.com>2022-02-09 07:57:29 +0100
commit53fa1bff3426344d466d91e81f076eab677d0ece (patch)
treee29317f8652ba42a4da2a3b98d90c11d6b65865c /drivers/nvdimm
parentcxl/core/port: Make passthrough decoder init implicit (diff)
downloadlinux-53fa1bff3426344d466d91e81f076eab677d0ece.tar.xz
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cxl/core: Track port depth
In preparation for proving CXL subsystem usage of the device_lock() order track the depth of ports with the expectation that shallower port locks can be held over deeper port locks. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/164298419321.3018233.4469731547378993606.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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