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| author | Serge Semin <Sergey.Semin@baikalelectronics.ru> | 2022-06-24 16:34:26 +0200 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-07-06 02:00:52 +0200 |
| commit | 43e6f2d94d91511ce0bdde411ca501cd829eab68 (patch) | |
| tree | cc283e9bf2b12a595dcfa209620457051fc82f75 /drivers/pci/controller/dwc/pcie-designware-plat.c | |
| parent | PCI: dwc: Rename struct pcie_port to dw_pcie_rp (diff) | |
| download | linux-43e6f2d94d91511ce0bdde411ca501cd829eab68.tar.xz linux-43e6f2d94d91511ce0bdde411ca501cd829eab68.zip | |
PCI: dwc-plat: Simplify dw_plat_pcie_probe() return values
Save the return value in "ret" for all three cases (DW_PCIE_RC_TYPE,
DW_PCIE_EP_TYPE, default) handled by dw_plat_pcie_probe() and return from a
single place.
[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20220624143428.8334-17-Sergey.Semin@baikalelectronics.ru
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware-plat.c')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-plat.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-plat.c b/drivers/pci/controller/dwc/pcie-designware-plat.c index 97de6ad7f9db..c6871bebf3fe 100644 --- a/drivers/pci/controller/dwc/pcie-designware-plat.c +++ b/drivers/pci/controller/dwc/pcie-designware-plat.c @@ -143,20 +143,21 @@ static int dw_plat_pcie_probe(struct platform_device *pdev) return -ENODEV; ret = dw_plat_add_pcie_port(dw_plat_pcie, pdev); - if (ret < 0) - return ret; break; case DW_PCIE_EP_TYPE: if (!IS_ENABLED(CONFIG_PCIE_DW_PLAT_EP)) return -ENODEV; pci->ep.ops = &pcie_ep_ops; - return dw_pcie_ep_init(&pci->ep); + ret = dw_pcie_ep_init(&pci->ep); + break; default: dev_err(dev, "INVALID device type %d\n", dw_plat_pcie->mode); + ret = -EINVAL; + break; } - return 0; + return ret; } static const struct dw_plat_pcie_of_data dw_plat_pcie_rc_of_data = { |