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| author | Pali Rohár <pali@kernel.org> | 2022-01-04 16:35:29 +0100 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2022-02-03 11:54:07 +0100 |
| commit | c3bd7dc553eea5a3595ca3aa0adee9bf83622a1f (patch) | |
| tree | 0f3cf1d74afc83aa8658d7a9d39deb5d26b80d0a /drivers/pci/controller/pci-mvebu.c | |
| parent | PCI: mvebu: Update comment for PCI_EXP_LNKCTL register on emulated bridge (diff) | |
| download | linux-c3bd7dc553eea5a3595ca3aa0adee9bf83622a1f.tar.xz linux-c3bd7dc553eea5a3595ca3aa0adee9bf83622a1f.zip | |
PCI: mvebu: Fix reporting Data Link Layer Link Active on emulated bridge
Add support for reporting PCI_EXP_LNKSTA_DLLLA bit in Link Control register
on emulated bridge via PCIE_STAT_OFF reg. Function mvebu_pcie_link_up()
already parses this register and returns if Data Link is Active or not.
Also correctly indicate DLLLA capability via PCI_EXP_LNKCAP_DLLLARC bit in
Link Control Capability register which is required for reporting DLLLA bit.
Link: https://lore.kernel.org/r/20220104153529.31647-12-pali@kernel.org
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'drivers/pci/controller/pci-mvebu.c')
| -rw-r--r-- | drivers/pci/controller/pci-mvebu.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 48098deb9b7b..357f0f41f68e 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -548,13 +548,18 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge, /* * PCIe requires that the Clock Power Management capability bit * is hard-wired to zero for downstream ports but HW returns 1. + * Additionally enable Data Link Layer Link Active Reporting + * Capable bit as DL_Active indication is provided too. */ - *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP) & - ~PCI_EXP_LNKCAP_CLKPM; + *value = (mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP) & + ~PCI_EXP_LNKCAP_CLKPM) | PCI_EXP_LNKCAP_DLLLARC; break; case PCI_EXP_LNKCTL: - *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL); + /* DL_Active indication is provided via PCIE_STAT_OFF */ + *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL) | + (mvebu_pcie_link_up(port) ? + (PCI_EXP_LNKSTA_DLLLA << 16) : 0); break; case PCI_EXP_SLTCTL: |