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| author | Thomas Gleixner <tglx@linutronix.de> | 2016-11-16 14:19:34 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-11-16 14:19:34 +0100 |
| commit | 7ce7f35b33eb42b6aa4cf176fa34372b21b8472b (patch) | |
| tree | 12f3027003f1d7cce30f838265e4fab2d52c6cef /drivers/pci/host/pcie-designware.c | |
| parent | x86/intel_rdt: Update percpu closid immeditately on CPUs affected by changee (diff) | |
| parent | x86/cpuid: Provide get_scattered_cpuid_leaf() (diff) | |
| download | linux-7ce7f35b33eb42b6aa4cf176fa34372b21b8472b.tar.xz linux-7ce7f35b33eb42b6aa4cf176fa34372b21b8472b.zip | |
Merge branch 'x86/cpufeature' into x86/cache
Resolve the cpu/scattered conflict.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/pci/host/pcie-designware.c')
| -rw-r--r-- | drivers/pci/host/pcie-designware.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index 035f50c03281..bed19994c1e9 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c @@ -637,8 +637,6 @@ int dw_pcie_host_init(struct pcie_port *pp) } } - pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp); - if (pp->ops->host_init) pp->ops->host_init(pp); @@ -809,6 +807,11 @@ void dw_pcie_setup_rc(struct pcie_port *pp) { u32 val; + /* get iATU unroll support */ + pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp); + dev_dbg(pp->dev, "iATU unroll: %s\n", + pp->iatu_unroll_enabled ? "enabled" : "disabled"); + /* set the number of lanes */ val = dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL); val &= ~PORT_LINK_MODE_MASK; |