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authorSeungwon Jeon <tgih.jun@samsung.com>2013-10-09 17:12:21 +0200
committerBjorn Helgaas <bhelgaas@google.com>2013-10-09 17:12:21 +0200
commit18edf4512cfa3e3662bdbdfc5f11c2eb20721734 (patch)
tree582baf8a2fde7234af6bb53e895ba4c78a8411ed /drivers/pci/host/pcie-designware.h
parentPCI: exynos: Add missing clk_disable_unprepare() on error path (diff)
downloadlinux-18edf4512cfa3e3662bdbdfc5f11c2eb20721734.tar.xz
linux-18edf4512cfa3e3662bdbdfc5f11c2eb20721734.zip
PCI: designware: Add header guards
Add header guards to prevent redundant inclusion. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/host/pcie-designware.h')
-rw-r--r--drivers/pci/host/pcie-designware.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index faccbbf31907..d87fbaeffe70 100644
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -11,6 +11,9 @@
* published by the Free Software Foundation.
*/
+#ifndef _PCIE_DESIGNWARE_H
+#define _PCIE_DESIGNWARE_H
+
struct pcie_port_info {
u32 cfg0_size;
u32 cfg1_size;
@@ -77,3 +80,5 @@ int dw_pcie_host_init(struct pcie_port *pp);
int dw_pcie_setup(int nr, struct pci_sys_data *sys);
struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys);
int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
+
+#endif /* _PCIE_DESIGNWARE_H */