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authorBjorn Helgaas <bhelgaas@google.com>2016-10-06 20:25:47 +0200
committerBjorn Helgaas <bhelgaas@google.com>2016-10-11 15:31:52 +0200
commit8ad750193430668d1d833dbee94788533b417b9a (patch)
treeebaa766897d841009c61e673ee412bcaf2e25f53 /drivers/pci/host/pcie-designware.h
parentPCI: designware: Swap order of dw_pcie_writel_rc() reg/val arguments (diff)
downloadlinux-8ad750193430668d1d833dbee94788533b417b9a.tar.xz
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PCI: designware: Export dw_pcie_readl_rc(), dw_pcie_writel_rc()
Export dw_pcie_readl_rc() and dw_pcie_writel_rc(). Many other drivers can use these instead of implementing their own versions. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/host/pcie-designware.h')
-rw-r--r--drivers/pci/host/pcie-designware.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index c41384832766..a567ea288ee2 100644
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -72,6 +72,8 @@ struct pcie_host_ops {
int (*msi_host_init)(struct pcie_port *pp, struct msi_controller *chip);
};
+u32 dw_pcie_readl_rc(struct pcie_port *pp, u32 reg);
+void dw_pcie_writel_rc(struct pcie_port *pp, u32 reg, u32 val);
int dw_pcie_cfg_read(void __iomem *addr, int size, u32 *val);
int dw_pcie_cfg_write(void __iomem *addr, int size, u32 val);
irqreturn_t dw_handle_msi_irq(struct pcie_port *pp);