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authorBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>2017-01-31 09:59:30 +0100
committerBjorn Helgaas <bhelgaas@google.com>2017-02-10 21:22:17 +0100
commit26b54be568ad8611ebc62f02f9a5d5328e7b3392 (patch)
treea5c4e8e741e54a149e3caee2ca31c5a2728abc9f /drivers/pci/host/pcie-xilinx-nwl.c
parentPCI: xilinx: Configure PCIe MPS settings (diff)
downloadlinux-26b54be568ad8611ebc62f02f9a5d5328e7b3392.tar.xz
linux-26b54be568ad8611ebc62f02f9a5d5328e7b3392.zip
PCI: xilinx-nwl: Remove mask for messages not supported by AXI
Remove support for vendor-defined messages which are not supported by AXI. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/host/pcie-xilinx-nwl.c')
-rw-r--r--drivers/pci/host/pcie-xilinx-nwl.c14
1 files changed, 1 insertions, 13 deletions
diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c
index 43eaa4afab94..4c3e0ab35496 100644
--- a/drivers/pci/host/pcie-xilinx-nwl.c
+++ b/drivers/pci/host/pcie-xilinx-nwl.c
@@ -62,21 +62,9 @@
#define CFG_ENABLE_PM_MSG_FWD BIT(1)
#define CFG_ENABLE_INT_MSG_FWD BIT(2)
#define CFG_ENABLE_ERR_MSG_FWD BIT(3)
-#define CFG_ENABLE_SLT_MSG_FWD BIT(5)
-#define CFG_ENABLE_VEN_MSG_FWD BIT(7)
-#define CFG_ENABLE_OTH_MSG_FWD BIT(13)
-#define CFG_ENABLE_VEN_MSG_EN BIT(14)
-#define CFG_ENABLE_VEN_MSG_VEN_INV BIT(15)
-#define CFG_ENABLE_VEN_MSG_VEN_ID GENMASK(31, 16)
#define CFG_ENABLE_MSG_FILTER_MASK (CFG_ENABLE_PM_MSG_FWD | \
CFG_ENABLE_INT_MSG_FWD | \
- CFG_ENABLE_ERR_MSG_FWD | \
- CFG_ENABLE_SLT_MSG_FWD | \
- CFG_ENABLE_VEN_MSG_FWD | \
- CFG_ENABLE_OTH_MSG_FWD | \
- CFG_ENABLE_VEN_MSG_EN | \
- CFG_ENABLE_VEN_MSG_VEN_INV | \
- CFG_ENABLE_VEN_MSG_VEN_ID)
+ CFG_ENABLE_ERR_MSG_FWD)
/* Misc interrupt status mask bits */
#define MSGF_MISC_SR_RXMSG_AVAIL BIT(0)