summaryrefslogtreecommitdiffstats
path: root/drivers/pci/host/pcie-xilinx.c
diff options
context:
space:
mode:
authorLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2017-06-28 22:13:59 +0200
committerBjorn Helgaas <bhelgaas@google.com>2017-07-02 23:14:25 +0200
commit8c790a82add469a5e901bf612e2c30bf5085564d (patch)
tree20b26c51fd001668fb964e160ad7190395c9367c /drivers/pci/host/pcie-xilinx.c
parentPCI: altera: Convert PCI scan API to pci_scan_root_bus_bridge() (diff)
downloadlinux-8c790a82add469a5e901bf612e2c30bf5085564d.tar.xz
linux-8c790a82add469a5e901bf612e2c30bf5085564d.zip
PCI: xilinx: Convert PCI scan API to pci_scan_root_bus_bridge()
The introduction of pci_scan_root_bus_bridge() provides a PCI core API to scan a PCI root bus backed by an already initialized struct pci_host_bridge object, which simplifies the bus scan interface and makes the PCI scan root bus interface easier to generalize as members are added to the struct pci_host_bridge. Convert PCI xilinx host code to pci_scan_root_bus_bridge() to improve the PCI root bus scanning interface. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/pci/host/pcie-xilinx.c')
-rw-r--r--drivers/pci/host/pcie-xilinx.c29
1 files changed, 19 insertions, 10 deletions
diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index 2fe2df51f9f8..761f048480e9 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -633,6 +633,7 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct xilinx_pcie_port *port;
struct pci_bus *bus, *child;
+ struct pci_host_bridge *bridge;
int err;
resource_size_t iobase = 0;
LIST_HEAD(res);
@@ -640,9 +641,11 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
if (!dev->of_node)
return -ENODEV;
- port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
- if (!port)
- return -ENOMEM;
+ bridge = devm_pci_alloc_host_bridge(dev, sizeof(*port));
+ if (!bridge)
+ return -ENODEV;
+
+ port = pci_host_bridge_priv(bridge);
port->dev = dev;
@@ -671,17 +674,23 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
if (err)
goto error;
- bus = pci_create_root_bus(dev, 0, &xilinx_pcie_ops, port, &res);
- if (!bus) {
- err = -ENOMEM;
- goto error;
- }
+
+ list_splice_init(&res, &bridge->windows);
+ bridge->dev.parent = dev;
+ bridge->sysdata = port;
+ bridge->busnr = 0;
+ bridge->ops = &xilinx_pcie_ops;
#ifdef CONFIG_PCI_MSI
xilinx_pcie_msi_chip.dev = dev;
- bus->msi = &xilinx_pcie_msi_chip;
+ bridge->msi = &xilinx_pcie_msi_chip;
#endif
- pci_scan_child_bus(bus);
+ err = pci_scan_root_bus_bridge(bridge);
+ if (err < 0)
+ goto error;
+
+ bus = bridge->bus;
+
pci_assign_unassigned_bus_resources(bus);
#ifndef CONFIG_MICROBLAZE
pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);