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authorSean O. Stalley <sean.stalley@intel.com>2015-04-02 23:10:19 +0200
committerBjorn Helgaas <bhelgaas@google.com>2015-04-10 00:01:39 +0200
commit55db3208f238ee776f1f747734051723d8a3c13e (patch)
treeee168a99ac30c859d8158de29be3b25e4ab8078f /drivers/pci/pci.c
parentPCI: Don't clear ASPM bits when the FADT declares it's unsupported (diff)
downloadlinux-55db3208f238ee776f1f747734051723d8a3c13e.tar.xz
linux-55db3208f238ee776f1f747734051723d8a3c13e.zip
PCI: Read capability list as dwords, not bytes
Reading both the capability ID and "next" pointer at the same time lets us parse the list with half the number of config reads. Signed-off-by: Sean O. Stalley <sean.stalley@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to '')
-rw-r--r--drivers/pci/pci.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 81f06e8dcc04..3c84cc6bc75a 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -145,19 +145,22 @@ static int __pci_find_next_cap_ttl(struct pci_bus *bus, unsigned int devfn,
u8 pos, int cap, int *ttl)
{
u8 id;
+ u16 ent;
+
+ pci_bus_read_config_byte(bus, devfn, pos, &pos);
while ((*ttl)--) {
- pci_bus_read_config_byte(bus, devfn, pos, &pos);
if (pos < 0x40)
break;
pos &= ~3;
- pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_ID,
- &id);
+ pci_bus_read_config_word(bus, devfn, pos, &ent);
+
+ id = ent & 0xff;
if (id == 0xff)
break;
if (id == cap)
return pos;
- pos += PCI_CAP_LIST_NEXT;
+ pos = (ent >> 8);
}
return 0;
}