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| author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2024-04-18 18:04:24 +0200 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2024-07-10 01:20:11 +0200 |
| commit | 95cb8ff68851ed0d249fb8a1d9657987cd844e08 (patch) | |
| tree | 2c6399831f905b39c4618da306aa5bddf306193c /drivers/pci/pci.h | |
| parent | PCI: dwc: Add outbound MSG TLPs support (diff) | |
| download | linux-95cb8ff68851ed0d249fb8a1d9657987cd844e08.tar.xz linux-95cb8ff68851ed0d249fb8a1d9657987cd844e08.zip | |
PCI: Add PCIE_MSG_CODE_ASSERT_INTx message macros
Add "Message Routing" and "INTx Mechanism Messages" macros to enable
a PCIe driver to send messages for INTx Interrupt Signaling.
Values from PCIe r6.1, sec 2.2.8 and 2.2.8.1.
Link: https://lore.kernel.org/linux-pci/20240418-pme_msg-v8-1-a54265c39742@nxp.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Diffstat (limited to 'drivers/pci/pci.h')
| -rw-r--r-- | drivers/pci/pci.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index fd44565c4756..95c95d981241 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -22,6 +22,24 @@ */ #define PCIE_PME_TO_L2_TIMEOUT_US 10000 +/* Message Routing (r[2:0]); PCIe r6.0, sec 2.2.8 */ +#define PCIE_MSG_TYPE_R_RC 0 +#define PCIE_MSG_TYPE_R_ADDR 1 +#define PCIE_MSG_TYPE_R_ID 2 +#define PCIE_MSG_TYPE_R_BC 3 +#define PCIE_MSG_TYPE_R_LOCAL 4 +#define PCIE_MSG_TYPE_R_GATHER 5 + +/* INTx Mechanism Messages; PCIe r6.0, sec 2.2.8.1 */ +#define PCIE_MSG_CODE_ASSERT_INTA 0x20 +#define PCIE_MSG_CODE_ASSERT_INTB 0x21 +#define PCIE_MSG_CODE_ASSERT_INTC 0x22 +#define PCIE_MSG_CODE_ASSERT_INTD 0x23 +#define PCIE_MSG_CODE_DEASSERT_INTA 0x24 +#define PCIE_MSG_CODE_DEASSERT_INTB 0x25 +#define PCIE_MSG_CODE_DEASSERT_INTC 0x26 +#define PCIE_MSG_CODE_DEASSERT_INTD 0x27 + extern const unsigned char pcie_link_speed[]; extern bool pci_early_dump; |