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authorKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>2009-05-13 05:22:26 +0200
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-06-18 23:02:22 +0200
commitefdf8288819df67d608a186f9d17a7d4051f3c1f (patch)
tree3d781654102cafc726bbc1894070260364eac3af /drivers/pci/pcie/aspm.c
parentPCI ASPM: cleanup calc_Lx_latency (diff)
downloadlinux-efdf8288819df67d608a186f9d17a7d4051f3c1f.tar.xz
linux-efdf8288819df67d608a186f9d17a7d4051f3c1f.zip
PCI ASPM: remove has_switch field
We don't need the 'has_switch' field in the struct pcie_link_state. Acked-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/pcie/aspm.c')
-rw-r--r--drivers/pci/pcie/aspm.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 23fabb303e82..26fd39caebc5 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -48,8 +48,6 @@ struct pcie_link_state {
u32 clkpm_enabled:1; /* Current Clock PM state */
u32 clkpm_default:1; /* Default Clock PM state by BIOS */
- u32 has_switch:1; /* Downstream has switches? */
-
/* Latencies */
struct aspm_latency latency; /* Exit latency */
/*
@@ -595,7 +593,6 @@ static struct pcie_link_state *pcie_aspm_setup_link_state(struct pci_dev *pdev)
INIT_LIST_HEAD(&link->children);
INIT_LIST_HEAD(&link->link);
link->pdev = pdev;
- link->has_switch = pcie_aspm_downstream_has_switch(link);
if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) {
struct pcie_link_state *parent;
parent = pdev->bus->parent->self->link_state;
@@ -655,7 +652,7 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
* initialization will config the whole hierarchy. But we must
* make sure BIOS doesn't set unsupported link state.
*/
- if (link->has_switch) {
+ if (pcie_aspm_downstream_has_switch(link)) {
state = pcie_aspm_check_state(link, link->aspm_default);
__pcie_aspm_config_link(link, state);
} else {