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author | Bjorn Helgaas <bhelgaas@google.com> | 2018-03-09 18:21:25 +0100 |
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committer | Bjorn Helgaas <helgaas@kernel.org> | 2018-03-31 00:26:54 +0200 |
commit | 02bfeb484230dfd073148a17253aeb1717ce769c (patch) | |
tree | 1f64c93fbef2833821d68d1fd9e714564c1460d8 /drivers/pci/probe.c | |
parent | PCI/portdrv: Remove unused PCIE_PORT_SERVICE_VC (diff) | |
download | linux-02bfeb484230dfd073148a17253aeb1717ce769c.tar.xz linux-02bfeb484230dfd073148a17253aeb1717ce769c.zip |
PCI/portdrv: Simplify PCIe feature permission checking
Some PCIe features (AER, DPC, hotplug, PME) can be managed by either the
platform firmware or the OS, so the host bridge driver may have to request
permission from the platform before using them. On ACPI systems, this is
done by negotiate_os_control() in acpi_pci_root_add().
The PCIe port driver later uses pcie_port_platform_notify() and
pcie_port_acpi_setup() to figure out whether it can use these features.
But all we need is a single bit for each service, so these interfaces are
needlessly complicated.
Simplify this by adding bits in the struct pci_host_bridge to show when the
OS has permission to use each feature:
+ unsigned int native_aer:1; /* OS may use PCIe AER */
+ unsigned int native_hotplug:1; /* OS may use PCIe hotplug */
+ unsigned int native_pme:1; /* OS may use PCIe PME */
These are set when we create a host bridge, and the host bridge driver can
clear the bits corresponding to any feature the platform doesn't want us to
use.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/pci/probe.c')
-rw-r--r-- | drivers/pci/probe.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index ef5377438a1e..a00de697a970 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -540,6 +540,16 @@ struct pci_host_bridge *pci_alloc_host_bridge(size_t priv) INIT_LIST_HEAD(&bridge->windows); bridge->dev.release = pci_release_host_bridge_dev; + /* + * We assume we can manage these PCIe features. Some systems may + * reserve these for use by the platform itself, e.g., an ACPI BIOS + * may implement its own AER handling and use _OSC to prevent the + * OS from interfering. + */ + bridge->native_aer = 1; + bridge->native_hotplug = 1; + bridge->native_pme = 1; + return bridge; } EXPORT_SYMBOL(pci_alloc_host_bridge); |