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| author | Gavin Shan <shangw@linux.vnet.ibm.com> | 2012-09-12 00:59:45 +0200 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2012-09-12 00:59:45 +0200 |
| commit | ac5ad93e92c3ffca4c7ba386aaa34244e27b7759 (patch) | |
| tree | 53709126d79c3718c85fbca2ec5542aec88d4bd1 /drivers/pci/setup-bus.c | |
| parent | rtl8192e: Use PCI Express Capability accessors (diff) | |
| download | linux-ac5ad93e92c3ffca4c7ba386aaa34244e27b7759.tar.xz linux-ac5ad93e92c3ffca4c7ba386aaa34244e27b7759.zip | |
PCI: Add weak pcibios_window_alignment() interface
This patch implements a weak function to return the default I/O or memory
window alignment for a P2P bridge. By default, I/O windows are aligned to
4KiB or 1KiB and memory windows are aligned to 4MiB. Some platforms, e.g.,
powernv, have special alignment requirements and can override
pcibios_window_alignment().
[bhelgaas: changelog]
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/setup-bus.c')
| -rw-r--r-- | drivers/pci/setup-bus.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index fb506137aaee..896f06e3e793 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -697,6 +697,38 @@ static resource_size_t calculate_memsize(resource_size_t size, return size; } +resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus, + unsigned long type) +{ + return 1; +} + +#define PCI_P2P_DEFAULT_MEM_ALIGN 0x100000 /* 1MiB */ +#define PCI_P2P_DEFAULT_IO_ALIGN 0x1000 /* 4KiB */ +#define PCI_P2P_DEFAULT_IO_ALIGN_1K 0x400 /* 1KiB */ + +static resource_size_t window_alignment(struct pci_bus *bus, + unsigned long type) +{ + resource_size_t align = 1, arch_align; + + if (type & IORESOURCE_MEM) + align = PCI_P2P_DEFAULT_MEM_ALIGN; + else if (type & IORESOURCE_IO) { + /* + * Per spec, I/O windows are 4K-aligned, but some + * bridges have an extension to support 1K alignment. + */ + if (bus->self->io_window_1k) + align = PCI_P2P_DEFAULT_IO_ALIGN_1K; + else + align = PCI_P2P_DEFAULT_IO_ALIGN; + } + + arch_align = pcibios_window_alignment(bus, type); + return max(align, arch_align); +} + /** * pbus_size_io() - size the io window of a given bus * |