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authorMinghuan Lian <Minghuan.Lian@freescale.com>2014-09-23 16:28:56 +0200
committerBjorn Helgaas <bhelgaas@google.com>2014-09-24 15:01:47 +0200
commitec98e9ab6f2475ff57c12d069e78b90548c0f60e (patch)
treebc805deeeb15cd11d1b2e457cec031ca5ba3a8c2 /drivers/pci
parentPCI: designware: Use NULL instead of false (diff)
downloadlinux-ec98e9ab6f2475ff57c12d069e78b90548c0f60e.tar.xz
linux-ec98e9ab6f2475ff57c12d069e78b90548c0f60e.zip
PCI: designware: Fix configuration base address when using 'reg'
The code has calculated cfg0_base and cfg1_base when parsing 'reg' or 'ranges' property of PCI DTS node, so remove duplicate calculation. When using 'reg', resource cfg is not used, so this code computed an incorrect configuration base. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Mohit KUMAR <mohit.kumar@st.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/host/pcie-designware.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index 1c59e4e6b2f0..b0dd2606edee 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -510,7 +510,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
pp->mem_base = pp->mem.start;
if (!pp->va_cfg0_base) {
- pp->cfg0_base = pp->cfg.start;
pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
pp->cfg0_size);
if (!pp->va_cfg0_base) {
@@ -520,7 +519,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
}
if (!pp->va_cfg1_base) {
- pp->cfg1_base = pp->cfg.start + pp->cfg0_size;
pp->va_cfg1_base = devm_ioremap(pp->dev, pp->cfg1_base,
pp->cfg1_size);
if (!pp->va_cfg1_base) {