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authorKishon Vijay Abraham I <kishon@ti.com>2019-01-14 12:15:01 +0100
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2019-02-14 17:09:47 +0100
commit3b4322e589a630fe35944ced5852655fcc4a5d24 (patch)
treee991074f46698e138b82f7200514b63b1e080d79 /drivers/pci
parentPCI: dwc: Add ->get_features() callback function to dw_pcie_ep_ops (diff)
downloadlinux-3b4322e589a630fe35944ced5852655fcc4a5d24.tar.xz
linux-3b4322e589a630fe35944ced5852655fcc4a5d24.zip
PCI: designware-plat: Populate ->get_features() dw_pcie_ep_ops
Populate ->get_features() dw_pcie_ep_ops to return the EPC features supported by Designware PCIe endpoint controller. Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/controller/dwc/pcie-designware-plat.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-plat.c b/drivers/pci/controller/dwc/pcie-designware-plat.c
index c12bf794d69c..bd0516afc86f 100644
--- a/drivers/pci/controller/dwc/pcie-designware-plat.c
+++ b/drivers/pci/controller/dwc/pcie-designware-plat.c
@@ -100,9 +100,22 @@ static int dw_plat_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
return 0;
}
+static const struct pci_epc_features dw_plat_pcie_epc_features = {
+ .linkup_notifier = false,
+ .msi_capable = true,
+ .msix_capable = true,
+};
+
+static const struct pci_epc_features*
+dw_plat_pcie_get_features(struct dw_pcie_ep *ep)
+{
+ return &dw_plat_pcie_epc_features;
+}
+
static struct dw_pcie_ep_ops pcie_ep_ops = {
.ep_init = dw_plat_pcie_ep_init,
.raise_irq = dw_plat_pcie_ep_raise_irq,
+ .get_features = dw_plat_pcie_get_features,
};
static int dw_plat_add_pcie_port(struct dw_plat_pcie *dw_plat_pcie,