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authorBjorn Helgaas <bhelgaas@google.com>2015-06-13 00:27:43 +0200
committerBjorn Helgaas <bhelgaas@google.com>2015-06-16 15:18:19 +0200
commit2393f79cf92ed3bfaf1a6982a18bae4d289aeda8 (patch)
tree7fab4320777f6618437f0701aabdd4e5b8471330 /drivers/pci
parentPCI: imx6: Use "u32", not "uint32_t" (diff)
downloadlinux-2393f79cf92ed3bfaf1a6982a18bae4d289aeda8.tar.xz
linux-2393f79cf92ed3bfaf1a6982a18bae4d289aeda8.zip
PCI: imx6: Add #define PCIE_RC_LCSR
Define PCIE_RC_LCSR and use it instead of the bare offset "0x80." No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/host/pci-imx6.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index 776789f0ebe0..a4ee579421df 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -47,6 +47,8 @@ struct imx6_pcie {
#define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2 0x2
#define PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK 0xf
+#define PCIE_RC_LCSR 0x80
+
/* PCIe Port Logic registers (memory-mapped) */
#define PL_OFFSET 0x700
#define PCIE_PL_PFLR (PL_OFFSET + 0x08)
@@ -427,7 +429,7 @@ static int imx6_pcie_start_link(struct pcie_port *pp)
return ret;
}
- tmp = readl(pp->dbi_base + 0x80);
+ tmp = readl(pp->dbi_base + PCIE_RC_LCSR);
dev_dbg(pp->dev, "Link up, Gen=%i\n", (tmp >> 16) & 0xf);
return 0;
}