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| author | Kishon Vijay Abraham I <kishon@ti.com> | 2021-02-01 20:58:04 +0100 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2021-02-23 21:12:18 +0100 |
| commit | a62074a9ba856082a60ff60693abd79f4b55177d (patch) | |
| tree | 915ef9d3d729d2c0af4009060dbf772baacbd35e /drivers/pci | |
| parent | PCI: cadence: Implement ->msi_map_irq() ops (diff) | |
| download | linux-a62074a9ba856082a60ff60693abd79f4b55177d.tar.xz linux-a62074a9ba856082a60ff60693abd79f4b55177d.zip | |
PCI: cadence: Configure LM_EP_FUNC_CFG based on epc->function_num_map
The number of functions supported by the endpoint controller is configured
in LM_EP_FUNC_CFG based on func_no member of struct pci_epf. Now that an
endpoint function can be associated with two endpoint controllers (primary
and secondary), just using func_no will not suffice as that will take into
account only if the endpoint controller is associated with the primary
interface of endpoint function. Instead use epc->function_num_map which
will already have the configured functions information (irrespective of
whether the endpoint controller is associated with primary or secondary
interface).
Link: https://lore.kernel.org/r/20210201195809.7342-13-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Tom Joseph <tjoseph@cadence.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/controller/cadence/pcie-cadence-ep.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/drivers/pci/controller/cadence/pcie-cadence-ep.c b/drivers/pci/controller/cadence/pcie-cadence-ep.c index dc88078194cb..897cdde02bd8 100644 --- a/drivers/pci/controller/cadence/pcie-cadence-ep.c +++ b/drivers/pci/controller/cadence/pcie-cadence-ep.c @@ -506,18 +506,13 @@ static int cdns_pcie_ep_start(struct pci_epc *epc) struct cdns_pcie_ep *ep = epc_get_drvdata(epc); struct cdns_pcie *pcie = &ep->pcie; struct device *dev = pcie->dev; - struct pci_epf *epf; - u32 cfg; int ret; /* * BIT(0) is hardwired to 1, hence function 0 is always enabled * and can't be disabled anyway. */ - cfg = BIT(0); - list_for_each_entry(epf, &epc->pci_epf, list) - cfg |= BIT(epf->func_no); - cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, cfg); + cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, epc->function_num_map); ret = cdns_pcie_start_link(pcie); if (ret) { |