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authorHeiner Kallweit <hkallweit1@gmail.com>2024-04-18 20:29:21 +0200
committerBjorn Helgaas <bhelgaas@google.com>2024-04-18 20:46:19 +0200
commitc7ae396ec597b2f3644f90f5c7278674b0527aa9 (patch)
tree9b65c014d6d047a02e5fa2e4a846505e2e466e96 /drivers/pci
parentPCI: Constify pcibus_class (diff)
downloadlinux-c7ae396ec597b2f3644f90f5c7278674b0527aa9.tar.xz
linux-c7ae396ec597b2f3644f90f5c7278674b0527aa9.zip
PCI: Annotate pci_cache_line_size variables as __ro_after_init
Annotate both variables as __ro_after_init, enforcing that they can't be changed after the init phase. Link: https://lore.kernel.org/r/52fd058d-6d72-48db-8e61-5fcddcd0aa51@gmail.com Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pci.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index e5f243dd4288..9ee0d4e8808e 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -142,8 +142,8 @@ enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_DEFAULT;
* the dfl or actual value as it sees fit. Don't forget this is
* measured in 32-bit words, not bytes.
*/
-u8 pci_dfl_cache_line_size = L1_CACHE_BYTES >> 2;
-u8 pci_cache_line_size;
+u8 pci_dfl_cache_line_size __ro_after_init = L1_CACHE_BYTES >> 2;
+u8 pci_cache_line_size __ro_after_init ;
/*
* If we set up a device for bus mastering, we need to check the latency