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authorHyungwon Hwang <human.hwang@samsung.com>2015-06-12 14:59:03 +0200
committerInki Dae <inki.dae@samsung.com>2015-06-22 13:05:00 +0200
commit26269af95af83145a3bccca41344c66502fdded9 (patch)
tree10d7d375f751e2a61cc1a9c0a51c4d6c07cb7ee0 /drivers/pcmcia/pxa2xx_stargate2.c
parentdrm/exynos: mic: add MIC driver (diff)
downloadlinux-26269af95af83145a3bccca41344c66502fdded9.tar.xz
linux-26269af95af83145a3bccca41344c66502fdded9.zip
drm/exynos: dsi: rename pll_clk to sclk_clk
This patch renames pll_clk to sclk_clk. The clock referenced by pll_clk is actually not the pll input clock for dsi. The pll input clock comes from the board's oscillator directly. But for the backward compatibility, the old clock name "pll_clk" is also OK. Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/pcmcia/pxa2xx_stargate2.c')
0 files changed, 0 insertions, 0 deletions