diff options
author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2018-01-02 12:25:33 +0100 |
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committer | Will Deacon <will.deacon@arm.com> | 2018-01-02 17:43:12 +0100 |
commit | 7520fa99246dade7ab6dde1573a146beed632abd (patch) | |
tree | 06a4763f3370fb4fb2365924540330a4ee156bcc /drivers/perf/Kconfig | |
parent | dt-bindings: Document devicetree binding for ARM DSU PMU (diff) | |
download | linux-7520fa99246dade7ab6dde1573a146beed632abd.tar.xz linux-7520fa99246dade7ab6dde1573a146beed632abd.zip |
perf: ARM DynamIQ Shared Unit PMU support
Add support for the Cluster PMU part of the ARM DynamIQ Shared Unit (DSU).
The DSU integrates one or more cores with an L3 memory system, control
logic, and external interfaces to form a multicore cluster. The PMU
allows counting the various events related to L3, SCU etc, along with
providing a cycle counter.
The PMU can be accessed via system registers, which are common
to the cores in the same cluster. The PMU registers follow the
semantics of the ARMv8 PMU, mostly, with the exception that
the counters record the cluster wide events.
This driver is mostly based on the ARMv8 and CCI PMU drivers.
The driver only supports ARM64 at the moment. It can be extended
to support ARM32 by providing register accessors like we do in
arch/arm64/include/arm_dsu_pmu.h.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/perf/Kconfig')
-rw-r--r-- | drivers/perf/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig index b8f44b068fc6..da5724cd89cf 100644 --- a/drivers/perf/Kconfig +++ b/drivers/perf/Kconfig @@ -17,6 +17,15 @@ config ARM_PMU_ACPI depends on ARM_PMU && ACPI def_bool y +config ARM_DSU_PMU + tristate "ARM DynamIQ Shared Unit (DSU) PMU" + depends on ARM64 + help + Provides support for performance monitor unit in ARM DynamIQ Shared + Unit (DSU). The DSU integrates one or more cores with an L3 memory + system, control logic. The PMU allows counting various events related + to DSU. + config HISI_PMU bool "HiSilicon SoC PMU" depends on ARM64 && ACPI |