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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2022-02-09 19:47:58 +0100
committerWill Deacon <will@kernel.org>2022-02-15 17:51:26 +0100
commit8ddf4eff71e12e4295b54ac8b02439ad22271fd2 (patch)
tree796e3ccd8c57fcfe6af7298f135031743832c1e3 /drivers/perf
parentiommu/arm-smmu-v3: fix event handling soft lockup (diff)
downloadlinux-8ddf4eff71e12e4295b54ac8b02439ad22271fd2.tar.xz
linux-8ddf4eff71e12e4295b54ac8b02439ad22271fd2.zip
perf/smmuv3: Don't cast parameter in bit operations
While in this particular case it would not be a (critical) issue, the pattern itself is bad and error prone in case somebody blindly copies to their code. Don't cast parameter to unsigned long pointer in the bit operations. Instead copy to a local variable on stack of a proper type and use. Note, new compilers might warn on this line for potential outbound access. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/20220209184758.56578-1-andriy.shevchenko@linux.intel.com Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/perf')
-rw-r--r--drivers/perf/arm_smmuv3_pmu.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c
index c49108a72865..00d4c45a8017 100644
--- a/drivers/perf/arm_smmuv3_pmu.c
+++ b/drivers/perf/arm_smmuv3_pmu.c
@@ -654,6 +654,7 @@ static int smmu_pmu_offline_cpu(unsigned int cpu, struct hlist_node *node)
static irqreturn_t smmu_pmu_handle_irq(int irq_num, void *data)
{
struct smmu_pmu *smmu_pmu = data;
+ DECLARE_BITMAP(ovs, BITS_PER_TYPE(u64));
u64 ovsr;
unsigned int idx;
@@ -663,7 +664,8 @@ static irqreturn_t smmu_pmu_handle_irq(int irq_num, void *data)
writeq(ovsr, smmu_pmu->reloc_base + SMMU_PMCG_OVSCLR0);
- for_each_set_bit(idx, (unsigned long *)&ovsr, smmu_pmu->num_counters) {
+ bitmap_from_u64(ovs, ovsr);
+ for_each_set_bit(idx, ovs, smmu_pmu->num_counters) {
struct perf_event *event = smmu_pmu->events[idx];
struct hw_perf_event *hwc;