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author | Linus Walleij <linus.walleij@linaro.org> | 2015-01-20 11:03:07 +0100 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2015-01-20 11:03:07 +0100 |
commit | ee65ef609aa81539ac3792df88f04bfe29a77546 (patch) | |
tree | 6816eaa3d45fa1078408f2ccfa5f88d32733d1d9 /drivers/phy/phy-omap-control.c | |
parent | Documentation: gpio: Add APM X-Gene standby GPIO controller DTS binding (diff) | |
parent | Linux 3.19-rc5 (diff) | |
download | linux-ee65ef609aa81539ac3792df88f04bfe29a77546.tar.xz linux-ee65ef609aa81539ac3792df88f04bfe29a77546.zip |
Merge tag 'v3.19-rc5' into devel
Linux 3.19-rc5
Diffstat (limited to 'drivers/phy/phy-omap-control.c')
-rw-r--r-- | drivers/phy/phy-omap-control.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c index c96e8183a8ff..efe724f97e02 100644 --- a/drivers/phy/phy-omap-control.c +++ b/drivers/phy/phy-omap-control.c @@ -29,10 +29,9 @@ /** * omap_control_pcie_pcs - set the PCS delay count * @dev: the control module device - * @id: index of the pcie PHY (should be 1 or 2) * @delay: 8 bit delay value */ -void omap_control_pcie_pcs(struct device *dev, u8 id, u8 delay) +void omap_control_pcie_pcs(struct device *dev, u8 delay) { u32 val; struct omap_control_phy *control_phy; @@ -55,8 +54,8 @@ void omap_control_pcie_pcs(struct device *dev, u8 id, u8 delay) val = readl(control_phy->pcie_pcs); val &= ~(OMAP_CTRL_PCIE_PCS_MASK << - (id * OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT)); - val |= delay << (id * OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT); + OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT); + val |= (delay << OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT); writel(val, control_phy->pcie_pcs); } EXPORT_SYMBOL_GPL(omap_control_pcie_pcs); |