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authorHeiko Stuebner <heiko.stuebner@theobroma-systems.com>2019-11-08 01:06:40 +0100
committerKishon Vijay Abraham I <kishon@ti.com>2020-01-08 08:28:06 +0100
commitf0684c1a836770afba7a7097e61935edd69693bf (patch)
tree21ba2ab6dd5329f45815d30043271d3b0c247829 /drivers/phy/st/phy-miphy28lp.c
parentdt-bindings: phy: drop #clock-cells from rockchip,px30-dsi-dphy (diff)
downloadlinux-f0684c1a836770afba7a7097e61935edd69693bf.tar.xz
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phy/rockchip: inno-dsidphy: generalize parameter handling
During review it came to light that exposing the pll clock outside is not the right approach and struct phy_configure_opts_mipi_dphy exists just for that reason to transfer parameters to the phy. So drop the exposed clock and rely on the phy configure options to bring in the correct rate. That way we can also just drop the open coded timing struct and default values function. Fixes: b7535a3bc0ba ("phy/rockchip: Add support for Innosilicon MIPI/LVDS/TTL PHY") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy/st/phy-miphy28lp.c')
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