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author | Grygorii Strashko <grygorii.strashko@ti.com> | 2020-08-28 22:19:42 +0200 |
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committer | Vinod Koul <vkoul@kernel.org> | 2020-09-08 12:23:10 +0200 |
commit | d3fa20b97c779e1dfd341e65a3b84eb1ad650ae7 (patch) | |
tree | 1a5bcfcbd8c68f4ab93666aabc7b24372250e9c3 /drivers/phy/ti/phy-gmii-sel.c | |
parent | phy: ti: gmii-sel: move phy init in separate function (diff) | |
download | linux-d3fa20b97c779e1dfd341e65a3b84eb1ad650ae7.tar.xz linux-d3fa20b97c779e1dfd341e65a3b84eb1ad650ae7.zip |
phy: ti: gmii-sel: use features mask during init
Use features mask during PHYs initialization to simplify code.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20200828201943.29155-3-grygorii.strashko@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/ti/phy-gmii-sel.c')
-rw-r--r-- | drivers/phy/ti/phy-gmii-sel.c | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/phy/ti/phy-gmii-sel.c b/drivers/phy/ti/phy-gmii-sel.c index d4b02ad023b2..a6b7f22e85c4 100644 --- a/drivers/phy/ti/phy-gmii-sel.c +++ b/drivers/phy/ti/phy-gmii-sel.c @@ -147,13 +147,9 @@ static const struct reg_field phy_gmii_sel_fields_dra7[][PHY_GMII_SEL_LAST] = { { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x554, 0, 1), - [PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD((~0), 0, 0), - [PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD((~0), 0, 0), }, { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x554, 4, 5), - [PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD((~0), 0, 0), - [PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD((~0), 0, 0), }, }; @@ -174,8 +170,6 @@ static const struct reg_field phy_gmii_sel_fields_am654[][PHY_GMII_SEL_LAST] = { { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4040, 0, 1), - [PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD((~0), 0, 0), - [PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD((~0), 0, 0), }, }; @@ -266,7 +260,7 @@ static int phy_gmii_init_phy(struct phy_gmii_sel_priv *priv, int port, if_phy->fields[PHY_GMII_SEL_PORT_MODE] = regfield; field = *fields++; - if (field.reg != (~0)) { + if (soc_data->features & BIT(PHY_GMII_SEL_RGMII_ID_MODE)) { regfield = devm_regmap_field_alloc(dev, priv->regmap, field); @@ -278,7 +272,7 @@ static int phy_gmii_init_phy(struct phy_gmii_sel_priv *priv, int port, } field = *fields; - if (field.reg != (~0)) { + if (soc_data->features & BIT(PHY_GMII_SEL_RMII_IO_CLK_EN)) { regfield = devm_regmap_field_alloc(dev, priv->regmap, field); |