diff options
| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2023-03-09 07:35:12 +0100 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2023-05-16 16:30:51 +0200 |
| commit | 6a301188420ae53d8606ef4c5584fc015574e1f9 (patch) | |
| tree | 1a799cfb35165148eb4b7e99238431d2a0383e3f /drivers/phy | |
| parent | phy: freescale: imx8m-pcie: Use devm_platform_ioremap_resource() (diff) | |
| download | linux-6a301188420ae53d8606ef4c5584fc015574e1f9.tar.xz linux-6a301188420ae53d8606ef4c5584fc015574e1f9.zip | |
phy: ti: gmii-sel: Add support for SGMII mode
Add support to configure the CPSW MAC's PHY in SGMII mode if the SoC
supports it. The extra_modes member of the phy_gmii_sel_soc_data struct
corresponding to the SoC is used to determine whether or not the SoC
supports SGMII mode.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230309063514.398705-2-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy')
| -rw-r--r-- | drivers/phy/ti/phy-gmii-sel.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/phy/ti/phy-gmii-sel.c b/drivers/phy/ti/phy-gmii-sel.c index 8c667819c39a..5e16d8dd5bee 100644 --- a/drivers/phy/ti/phy-gmii-sel.c +++ b/drivers/phy/ti/phy-gmii-sel.c @@ -23,6 +23,7 @@ #define AM33XX_GMII_SEL_MODE_RGMII 2 /* J72xx SoC specific definitions for the CONTROL port */ +#define J72XX_GMII_SEL_MODE_SGMII 3 #define J72XX_GMII_SEL_MODE_QSGMII 4 #define J72XX_GMII_SEL_MODE_QSGMII_SUB 6 @@ -106,6 +107,13 @@ static int phy_gmii_sel_mode(struct phy *phy, enum phy_mode mode, int submode) gmii_sel_mode = J72XX_GMII_SEL_MODE_QSGMII_SUB; break; + case PHY_INTERFACE_MODE_SGMII: + if (!(soc_data->extra_modes & BIT(PHY_INTERFACE_MODE_SGMII))) + goto unsupported; + else + gmii_sel_mode = J72XX_GMII_SEL_MODE_SGMII; + break; + default: goto unsupported; } |