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authorMaxime Chevallier <maxime.chevallier@bootlin.com>2022-08-26 16:17:22 +0200
committerDavid S. Miller <davem@davemloft.net>2022-08-31 13:54:48 +0200
commit215da896df6cceccd2faea2d36971de21a3d9f19 (patch)
tree450eeae9be8c70ce28e624a5272370526cf5a5f8 /drivers/phy
parentMerge branch 'net-dsa-microchip-error-hndling-reg-access-validation' (diff)
downloadlinux-215da896df6cceccd2faea2d36971de21a3d9f19.tar.xz
linux-215da896df6cceccd2faea2d36971de21a3d9f19.zip
phy: lan966x: add support for QUSGMII
Makes so that the serdes driver also takes QUSGMII in consideration. It's configured exactly as QSGMII as far as the serdes driver is concerned. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/microchip/lan966x_serdes.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/phy/microchip/lan966x_serdes.c b/drivers/phy/microchip/lan966x_serdes.c
index e86a879b92b5..d1a50fa81130 100644
--- a/drivers/phy/microchip/lan966x_serdes.c
+++ b/drivers/phy/microchip/lan966x_serdes.c
@@ -401,6 +401,9 @@ static int serdes_set_mode(struct phy *phy, enum phy_mode mode, int submode)
submode == PHY_INTERFACE_MODE_2500BASEX)
submode = PHY_INTERFACE_MODE_SGMII;
+ if (submode == PHY_INTERFACE_MODE_QUSGMII)
+ submode = PHY_INTERFACE_MODE_QSGMII;
+
for (i = 0; i < ARRAY_SIZE(lan966x_serdes_muxes); i++) {
if (macro->idx != lan966x_serdes_muxes[i].idx ||
mode != lan966x_serdes_muxes[i].mode ||