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author | Wei Chen <Wei.Chen@csr.com> | 2015-05-18 09:28:32 +0200 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2015-05-19 16:01:30 +0200 |
commit | f9367793293d2262460942b0a4904c21857a1a8b (patch) | |
tree | 16025449bf36853d61ba2beb9727e1ba61d7682d /drivers/pinctrl/Kconfig | |
parent | pinctrl: zynq: add static to platform_driver remove callback (diff) | |
download | linux-f9367793293d2262460942b0a4904c21857a1a8b.tar.xz linux-f9367793293d2262460942b0a4904c21857a1a8b.zip |
pinctrl: sirf: add sirf atlas7 pinctrl and gpio support
The Pinctrl module (ioc) controls the Pad's function select
(each pad can have 8 functions), Pad's Drive Strength, Pad's
Pull Select and Pad's Input Disable status.
The ioc has two modules, ioc_top & ioc_rtc. Both of these two
modules have function select/clear, Pull select and Drive
Strength registers. But only ioc_rtc has input-disable
registers. The Pads on ioc_top have to access ioc_rtc to set
their input-disable status and intpu-disable-value.
So have to use one ioc driver instance to drive these two
ioc modules at the same time, and each ioc module will be
treat as one bank on the "IOC Device".
The GPIO Controller controls the GPIO status if the Pad has
been config as GPIO by Pinctrl already. Includes the GPIO
Input/output, Interrupt type, Interrupt Status, and Set/Get
Values.
The GPIO pull up/down are controlled by Pinctrl.
There are 7 GPIO Groups and splited into 3 MACROs in atlas7.
The GPIO Groups in one MACRO share one GPIO controllers, each
GPIO Group are treated as one GPIO bank.
For example:
In VDIFM macro, there is one GPIO Controller, it has 3 banks
to control 3 gpio groups. Its gpio name space is from 0 to 95.
The Device Tree can be written as following:
gpio-ranges = <&pinctrl 0 0 0>,
<&pinctrl 32 0 0>,
<&pinctrl 64 0 0>;
gpio-ranges-group-names = "gnss_gpio_grp",
"lcd_vip_gpio_grp",
"sdio_i2s_gpio_grp";
bank#0 is from 0~31, the pins are from pinctrl's "gnss_gpio_grp".
bank#2 is from 32~63, the pins are from pinctrl's "lcd_vip_gpio_grp".
bank#3 is from 64~95, the pins are from pinctrl's "sdio_i2s_gpio_grp".
Signed-off-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/Kconfig')
-rw-r--r-- | drivers/pinctrl/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 542a12a17991..100d9ac2ae1f 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -132,6 +132,8 @@ config PINCTRL_SIRF bool "CSR SiRFprimaII pin controller driver" depends on ARCH_SIRF select PINMUX + select PINCONF + select GENERIC_PINCONF select GPIOLIB_IRQCHIP config PINCTRL_PISTACHIO |