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authorJohnny Huang <johnny_huang@aspeedtech.com>2019-12-02 07:14:31 +0100
committerLinus Walleij <linus.walleij@linaro.org>2019-12-13 09:40:37 +0100
commit5f52c853847ffdc9654e5b685e1a1ae5bee83e65 (patch)
tree39f05f901bf1f17777376e1f9c8648621cfa44bb /drivers/pinctrl/aspeed/pinctrl-aspeed.c
parentpinctrl: aspeed: Move aspeed_pin_config_map to separate source file (diff)
downloadlinux-5f52c853847ffdc9654e5b685e1a1ae5bee83e65.tar.xz
linux-5f52c853847ffdc9654e5b685e1a1ae5bee83e65.zip
pinctrl: aspeed: Use masks to describe pinconf bitfields
Since some of the AST2600 pinconf setting are not just single bit, modified aspeed_pin_config @bit to @mask and add @mask to aspeed_pin_config_map to support configuring multiple bits. Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com> [AJ: Tweak commit message] Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20191202061432.3996-7-andrew@aj.id.au Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/aspeed/pinctrl-aspeed.c')
-rw-r--r--drivers/pinctrl/aspeed/pinctrl-aspeed.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
index fc68aca7b36c..b625a657171e 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
@@ -464,7 +464,7 @@ int aspeed_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset,
return rc;
pmap = find_pinconf_map(pdata, param, MAP_TYPE_VAL,
- (val & BIT(pconf->bit)) >> pconf->bit);
+ (val & pconf->mask) >> __ffs(pconf->mask));
if (!pmap)
return -EINVAL;
@@ -512,17 +512,17 @@ int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
if (WARN_ON(!pmap))
return -EINVAL;
- val = pmap->val << pconf->bit;
+ val = pmap->val << __ffs(pconf->mask);
rc = regmap_update_bits(pdata->scu, pconf->reg,
- BIT(pconf->bit), val);
+ pmap->mask, val);
if (rc < 0)
return rc;
- pr_debug("%s: Set SCU%02X[%d]=%d for param %d(=%d) on pin %d\n",
- __func__, pconf->reg, pconf->bit, pmap->val,
- param, arg, offset);
+ pr_debug("%s: Set SCU%02X[%lu]=%d for param %d(=%d) on pin %d\n",
+ __func__, pconf->reg, __ffs(pconf->mask),
+ pmap->val, param, arg, offset);
}
return 0;