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authorTakeshi Kihara <takeshi.kihara.df@renesas.com>2017-07-28 13:41:17 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2017-08-16 14:26:26 +0200
commit67c836b85d8fb755f769977aa3a3060e88eb156d (patch)
tree180f9b788b6cf18d59a1c84b9eda0e3d0c7b9e70 /drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
parentpinctrl: sh-pfc: r8a7795: Fix FMCLK{_C,_D} and FMIN{_C,_D} pin function defin... (diff)
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pinctrl: sh-pfc: r8a7795: Fix NFDATA{0..13} and NF{ALE,CLE,WE_N,RE_N} pin function definitions
This patch fixes the implementation incorrect of IPSR register value definitions for NFDATA{0..13} and NF{ALE,CLE,WE_N,RE_N} pins function. This is a correction to the incorrect implementation of IPSR register pin assignment of the specifications updated for R8A7795 ES2.0 SoC in R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/bcm/pinctrl-nsp-gpio.c')
0 files changed, 0 insertions, 0 deletions