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author | Ingo Molnar <mingo@kernel.org> | 2015-05-08 13:33:33 +0200 |
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committer | Ingo Molnar <mingo@kernel.org> | 2015-05-08 13:33:33 +0200 |
commit | 7ae383be81781c5e1347f71c3eb0d53ce5188200 (patch) | |
tree | d2dfedb78cf4ee2bc9cc460af3be106b08e01050 /drivers/pinctrl/intel/Kconfig | |
parent | x86: Force inlining of atomic ops (diff) | |
parent | Merge tag 'pm+acpi-4.1-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/... (diff) | |
download | linux-7ae383be81781c5e1347f71c3eb0d53ce5188200.tar.xz linux-7ae383be81781c5e1347f71c3eb0d53ce5188200.zip |
Merge branch 'linus' into x86/asm, before applying dependent patch
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'drivers/pinctrl/intel/Kconfig')
-rw-r--r-- | drivers/pinctrl/intel/Kconfig | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig index b801d869e91c..fe5e07db0a95 100644 --- a/drivers/pinctrl/intel/Kconfig +++ b/drivers/pinctrl/intel/Kconfig @@ -25,3 +25,20 @@ config PINCTRL_CHERRYVIEW help Cherryview/Braswell pinctrl driver provides an interface that allows configuring of SoC pins and using them as GPIOs. + +config PINCTRL_INTEL + tristate + select PINMUX + select PINCONF + select GENERIC_PINCONF + select GPIOLIB + select GPIOLIB_IRQCHIP + +config PINCTRL_SUNRISEPOINT + tristate "Intel Sunrisepoint pinctrl and GPIO driver" + depends on ACPI + select PINCTRL_INTEL + help + Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver + provides an interface that allows configuring of PCH pins and + using them as GPIOs. |